Chapter04

Chapter04 - Jaeger/Blalock Microelectronic Circuit Design...

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Unformatted text preview: Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-1 Chapter 4 Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-2 Chapter Goals • Describe operation of MOSFETs. • Define FET characteristics in operation regions of cutoff, triode and saturation. • Develop mathematical models for i-v characteristics of MOSFETs. • Introduce graphical representations for output and transfer characteristic descriptions of electron devices. • Define and contrast characteristics of enhancement-mode and depletion-mode FETs. • Define symbols to represent FETs in circuit schematics. • Investigate circuits that bias transistors into different operating regions. • Learn basic structure and mask layout for MOS transistors and circuits. • Explore MOS device scaling • Contrast 3 and 4 terminal device behavior. • Describe sources of capacitance in MOSFETs. • Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-2 Chapter Goals • Describe operation of MOSFETs. • Define FET characteristics in operation regions of cutoff, triode and saturation. • Develop mathematical models for i-v characteristics of MOSFETs. • Introduce graphical representations for output and transfer characteristic descriptions of electron devices. • Define and contrast characteristics of enhancement-mode and depletion-mode FETs. • Define symbols to represent FETs in circuit schematics. • Investigate circuits that bias transistors into different operating regions. • Learn basic structure and mask layout for MOS transistors and circuits. • Explore MOS device scaling • Contrast 3 and 4 terminal device behavior. • Describe sources of capacitance in MOSFETs. • Explore FET modeling in SPICE. Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-3 MOS Capacitor Structure • First electrode- Gate: Consists of low-resistivity material such as metal or polycrystalline silicon • Second electrode- Substrate or Body: n- or p-type semiconductor • Dielectric-Silicon dioxide:stable high-quality electrical insulator between gate and substrate. Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-4 Substrate Conditions for Different Biases • Accumulation – V G <<V TN • Depletion – V G <V TN • Inversion – V G >V TN Accumulation Depletion Inversion Jaeger/Blalock 4/25/07 Microelectronic Circuit Design, 3E McGraw-Hill Chap 4-5 Low-frequency C-V Characteristics for MOS Capacitor on P-type Substrate • MOS capacitance is non- linear function of voltage. • Total capacitance in any region dictated by the separation between capacitor plates....
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This note was uploaded on 07/31/2010 for the course ECE 204 taught by Professor Blalock during the Spring '09 term at UVA.

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Chapter04 - Jaeger/Blalock Microelectronic Circuit Design...

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