Lecture 11 - ISA (2010-02-16)

Lecture 11 - ISA (2010-02-16) - CDA 5106 Advanced Computer...

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1 CDA 5106 Advanced Computer Architecture I Instruction Set Architecture Design Computer Science Department University of Central Florida What is an ISA? • Hardware-software interface • Instruction Set Architecture (ISA) defines: STATE OF THE PROGRAM (processor registers memory – STATE OF THE PROGRAM (processor registers, memory) –WHAT INSTRUCTIONS DO: Semantics of instructions, how they update state –HOW INSTRUCTIONS ARE REPRESENTED: Syntax (bit encodings) • …selected so that implications of the above on hardware design/compiler design are optimal 2 – Example: register specifier moves around between different instructions-- need multiple lines and a mux before the register file.
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2 Why is the ISA important? • Fixed h/w-s/w interface for a generation of processors – IBM realized early the value of a fixed ISA – But: “stuck” with bad decisions for long time Recent developments mitigate ISA problems (e g x86 micro ops Recent developments mitigate ISA problems (e.g., x86 micro-ops, Transmeta, JIT compiler, virtual machines) • ISA decisions affect: (Revisit RISC vs. CISC…) 1. Memory cost of the machine ¾ Short vs. long bit encodings ¾ high vs. low semantic meaning per instruction 2. Hardware design ¾ Simple, uniform-complexity ops => efficient pipeline ¾ Don’t build hardware for instructions that never get used 3 3. Compiler and programming language issues ¾ How much can compiler exploit ISA to optimize perf. ¾ How well does ISA support high-level lang. constructs ¾ Choice for hand coding vs. compiler generated code: semantics are easy to use vs. easy to generate code for ISA Design Decisions & Outline • Style of operand specification: stack, accumulator, registers, etc. • Operand access limitation Operand access limitations • Addressing modes for operands • Semantics: – Mix of operations supported – Control transfers • Encoding tradeoffs • Compiler influenc 4 • Compiler influence •E x am p l e : M I P S
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3 Styles of ISAs Register Stack Accumulator Register- Memory Load-Store Push A Load A Load R1, A Load R1,A Push B Add B Add R1, B Load R2, B Add Store C Store C, R1 Add R3, R1, R2 Pop C Store C, R3 5 Why stacks, accumulators •S t a c k s : – Very compact format • All calculation operations take zero operand All calculation operations take zero operands • Example use: Java bytecode (low network b/w) – Theoretically shortest code for implementing arithmetic expressions • All HP calculator fanatics know this • Accumulator: –A l s o a v e ry compact format 6 – Less dependence on memory than stack-based •F o r b o t h : – Compact implies memory efficient – Good if memory is expensive
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4 Why registers? 1. Faster than memory Latency: raw access time (once address is known) Cache access: 2 cycles (typical) Register access: 1 cycle Register file typically smaller than data cache Register file doesn’t need tag check logic Bandwidth: more practical to multiport a register file ILP requires large number of operand ports
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Lecture 11 - ISA (2010-02-16) - CDA 5106 Advanced Computer...

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