Lecture 21 - Modern Renaming (2010-03-30)

Lecture 21 - Modern Renaming (2010-03-30) - 1 University of...

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Unformatted text preview: 1 University of Central Florida CDA 5106 CDA 5106 Modern Renaming Prof. Mark Heinrich School of Electrical Engineering and Computer Science heinrich@eecs.ucf.edu Reorder Buffer (ROB) Holds instruction results until commit allows forwarding of results to consumer instructions Delays update of architectural stat Delays update of architectural state Value in ROB committed when it reaches the ROB head Strictly in order (allocated at issue) ROB head : oldest (uncommitted) instruction Similar to Tomasulos reservation stations, but: Tomasulos: after CDB bcast, consumers find result in updated register file UCF ROB: supplies result to consumers on demand until producer commits 2 ROB Entry Fields Instruction type Destination branch: no destinatio branch: no destination store: destination address other: destination register Value: instructions result (outcome for branches) Ready bit: whether instruction has executed (and result is ready) UCF ROB-Extended Tomasulos Reservation stations (RS): buffer op and operands once issued until executed track assigned ROB entr track assigned ROB entry ROB provide renaming mechanism (tag results with ROB entry instead of RS) hold instructions relevant state from issue to commit, including result if any replaces store buffer in the case of stores store queue still needed if store-load reordering allowed Wh do I need renaming? UCF Why do I need renaming? Can predict branch, but then what? L: fld f0,0(r1) fadd f4,f0,f2 fst f4,0(r1) addi r1,r1,-8 bne r1,r2,L 3 Instruction Execution Issue: get instruction from instruction queue issue instruction to RS if RS and ROB entry available stall otherwis issue instruction to RS if RS and ROB entry available stall otherwise locate operands in register file or ROB entry...
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Lecture 21 - Modern Renaming (2010-03-30) - 1 University of...

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