1241130077 - Computer Organization CDA 3103 Dr. Hassan...

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Unformatted text preview: Computer Organization CDA 3103 Dr. Hassan Foroosh Dept. of Computer Science UCF Copyright Hassan Foroosh 2004 Computer System Organization Processor Computer Control Datapath Memory Devices Input Output 5 Components of a Computer System Control Logic, Datapath, Memory System, Input, Output Computer Architecture What is Computer Architecture? Computer Architecture Instruction Set Architecture + Machine Organization I/O system Proc. (Data + Ctrl) Compiler Operating System Application Logic Design Circuit Design Instruction Set Architecture Firmware Machine Organization Layout This Lecture: ISA & MIPS What is Assembly Language? Operands and data types Computational operations Memory access & addressing Branches Procedure call Instruction encoding Assembling and linking Other instruction sets Exceptions and interrupts (Ch. 4 & 5) Components of an ISA MIPS Architectural Approach Load/store or register-register instruction set only operate on data in registers register operations affect the entire contents of register no partial register writes except for single-precision FP only load/store instructions access memory true in all RISC instruction sets true in all instruction sets designed since 1980 Emphasis on efficient implementation Make the common case fast Simplicity: provide primitives rather than solutions Simplicity favors regularity Data Types: Typical Bit: 0, 1 Bit String: sequence of bits of a particular length 8 bits is a byte 16 bits is a half-word 32 bits is a word 64 bits is a double-word Character: supported as a byte (signed or unsigned) Decimal: digits 0-9 encoded as 0000b through 1001b, two per byte not supported in most newer architectures Integers: 2's Complement Floating Point: M x 2 E Single Precision Double Precision Extended Precision MIPS Storage Model 2 32 bytes of memory: accessible by loads/stores 31 x 32-bit GPRs or integer multiply/divide (plus R0 = 0) why only 32 registers? Smaller is faster PC: branch and procedure call $0 $1 $31 PC lo hi $f0 $f1 $f31 $f30 FP registers are paired for double-precision. Specify the even register, which holds the less-significant word. MIPS Register file $0 (zero): holds constant 0 $1 (at): Reserved for assembler to implement macro instructions $2 and $3 (v0 and v1): used for return values from function calls $4-$7 (a0-a3): used to pass arguments to functions $8-$25 (t0-t7, s0-s7, t8,t9): temporary registers $26 and $27 (k0 and k1): used by the OS kernel $28 (gp): pointer to global area $29 (sp): stack pointer $30 (fp): frame pointer $31 (ra): return address for function calls Instruction Formats Instruction register (IR): 32-bit register holding a copy of the most recently fetched instruction MIPS architecture has three different instruction formats: Register Format: 6 bits op-code, three 5 bits holding register numbers for sources...
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This note was uploaded on 08/22/2010 for the course CDA 3101 taught by Professor Staff during the Fall '07 term at University of Central Florida.

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1241130077 - Computer Organization CDA 3103 Dr. Hassan...

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