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Unformatted text preview: 2. (10 pts) Draw the switch level implementation for the following. Do not assume the
complements of each input are available. a. The following gate. FIB = F F=E+E
b. Fag}? F "EVE, ill—digit)” B——cl
F
Ll l B c. Three input AND gate. 2 HAND w, 5w F:ABDC 3. (5 pts) Fill in the following table with schematics of equivalent gates. Standard Gate DeMoroan’s E uivalent Gate 9—
i=. “ 4. (10 pts) Draw the switch level implementation of the following Boolean expression.
Assume that the complements of all signals are available. F =XB + 6(A +E) 5. (10 pts) Fill in the truth table for the following pullup circuit. Vdd 6. (10 pts) Complete the following circuit and the write the expression for the Boolean
function identiﬁed below that is computed by this circuit. F= DIB+CZ§E+B+552 7. (15 pts) Answer the following using the truth table below. d. Write the Sum of Minterms form of the expression denoted by the truth table. F = 85+ EECt A5? e. Algebraically simply the preceding expression. F= Eat + E55 + A35
5 EMGC) +ABC 3E8+ABE
: BC ll ME) r” slMpﬁficaxubn
’ B ITE f. Write the Product of Maxterms form of the expression computed by the truth
table F= (mam A+B+E "mm It? 5+2“: +B+C g. Algebraically simplify the preceding expression. F = (Mme) (MIME )(K+B~rc)(§+8+f) (E féﬁi)
‘ LCA+B)+(A+B)(C,+E)J [(M6) +(E+B)(C+c)j (MM ) : (MB) (MB) (Mme)
:[EJM BH+B)(;§+6+E)
‘ BUM“) (§+E+E)
‘ B(ﬁ+§>+E)
=ﬁB+BC
=B(A'+E) F : 5 EC 8. (10 pts) Using the mixed logic design methodology create a gate level
implementation of the following expression using only NAND gates and inverters.
Provide the number of transistors used in your implementation. F=X+B+C Number of transistors: If} 10 9. (15 pts) The following circuit was designed using a mixed logic design methodology.
Answer all of the following questions with respect to this circuit. a. What is the Boolean expression computed by this circuit? F = Avﬁv +E=E b. Reimplement this circuit using only 2input NOR gates and inverters. Show
the implementation below. What is the change in the number of transistors required?
Change in the # transistor count: %
5% ® Q)
——Do
a “50:33]
G) ”@D
C ﬁbo
@ g; F 4X9 r/e: 11 ...
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 Spring '10
 Wills

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