fa03-sw-s3b - ECE 2030 10:00am 4 problems, 3 pages Problem...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
ECE 2030 10:00am Computer Engineering Fall 2003 4 problems, 3 pages Exam Three Solution 19 November 2003 1 Problem 1 (3 parts, 12 points) Instruction Formats An instruction format has the following field lengths for R-type and I-type instructions. Answer the following questions: opcode R D R S1 R S2 8 bits 7 bits 7 bits 7 bits opcode R D R S1 immediate value 8 bits 7 bits 7 bits 21 bits Part A (4 points) How many registers are there? 128 Part B (4 points) How many instruction types are there? 256 Part C (4 points) What is the range of immediate values? -1M to +1M Problem 2 (3 parts, 32 points) Memory Systems Part A (12 points) Consider a 64 Mbit DRAM chip organized as 8 million addresses of 8 bit words . Assume both the DRAM cell and the DRAM chip are square. The column number and offset concatenate to form the memory address. Using the organization approach discussed in class, answer the following questions about the chip. Express all answers in decimal . number of columns K 8 2 2 13 26 = = column decoder required ( n to m ) 13 to 8K type of mux required ( n to m ) 8K / 8 = 1K to 1 number of muxes required
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 08/23/2010 for the course EE 2030 taught by Professor Wills during the Spring '10 term at Georgia Institute of Technology.

Page1 / 3

fa03-sw-s3b - ECE 2030 10:00am 4 problems, 3 pages Problem...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online