sp02-sw-s1 - ECE 2030 1:00pm 4 problems, 4 pages Problem 1...

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ECE 2030 1:00pm Computer Engineering Spring 2002 4 problems, 4 pages Exam One Solutions 6 February 2002 Problem 1 (3 parts, 27 points) Switch Design For each expression below, create a switch level implementation using N and P type switches. Assume both inputs and their complements are available. Your design should contain no shorts or floats. Use as few transistors as possible. A B Out x A C D BC D A B Out y C D A B C D Out z A B C A B C OUTx = D C B A + + OUTy = D C B A + OUTz = C B A + 1
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ECE 2030 1:00pm Computer Engineering Spring 2002 4 problems, 4 pages Exam One Solutions 6 February 2002 Problem 2 (3 parts, 27 points) Mixed Logic Reengineering A B C D E F OUTx OUTy Part A (9 points) Write the output expression for the gate design shown above. Also determine the number of switches used in its implementation. OUTx = D C B A + + OUTy = F E D C + + # switches = (3) x 6 + (2) x 4 + (6) x 2 = 38 Part B (9 points) Reimplement the behavior below with a mixed logic design style using only NAND gates and inverters. Determine the number of switches used in this implementation.
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This note was uploaded on 08/23/2010 for the course EE 2030 taught by Professor Wills during the Spring '10 term at Georgia Institute of Technology.

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sp02-sw-s1 - ECE 2030 1:00pm 4 problems, 4 pages Problem 1...

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