sp10-lw-s1 - ECE 2030B 4 problems, 5 pages Problem 1 (2...

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ECE 2030B Computer Engineering Spring 2010 4 problems, 5 pages Exam One Solutions 10 February 2010 1 Problem 1 (2 parts, 20 points) Switch-level Design The three parts below contain (A) a pull up network, (B) a pull down network, and (C) an expression to be implemented. For (A) and (B), complete the missing complementary switching networks so the circuit contains no floats or shorts and write the Boolean expression computed by the completed circuit. For (C), design the entire switching network. Assume the inputs and their complements are available. (A) (B) OUTx = ) ( ) ( F E D C B A + + + OUTy = E D C + OUTz = ) ( E D B C A + + (C)
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ECE 2030B Computer Engineering Spring 2010 4 problems, 5 pages Exam One Solutions 10 February 2010 2 Problem 2 (2 parts, 28 points) Mixed Logic Reengineering For the following expressions, implement the Boolean expression using the specified gate type. Use correct mixed-logic notation. Do not simplify the expression . You may use multi-input gates. Minimize the total transistors (switches) required. When possible, use common subexpressions to reduce gate counts. Also determine the number of switches used in each
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This note was uploaded on 08/23/2010 for the course EE 2030 taught by Professor Wills during the Spring '10 term at Georgia Institute of Technology.

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sp10-lw-s1 - ECE 2030B 4 problems, 5 pages Problem 1 (2...

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