Unformatted text preview: ECE164 Analog Integrated Circuit Design I November 2, 2004 Due: Beginning of class, Tuesday, November 9, 2004 Homework Assignment 4 Ian Galton EBU1 3801 Reading:
Chapter 4 of Razavi Problems: Note: The exams for questions 1, 2, and 3 are included with this PDF. 1. Please download and solve the problems on the rst midterm exam for ECE164 this year. 2. Please download and solve the problems on the rst midterm exam for ECE164 in 1999. 3. Please download and solve the problems on the rst midterm exam for ECE164 in 1998. 2. This problem relates to the following circuit. The voltage VG3 is a DC bias voltage generated by circuitry not shown in the gure. You may assume that M1 and M2 are identical, that M4 and M5 are identical, and that the input signal frequencies are su ciently low that all capacitances can be ignored. For Parts a)e), you may assume that all transistors are in saturation.
VDD M4 VDD M5 R R Vo 1 M1 Vi + 1 − VG 3 M3 Vo 2 M2 + V − i2 a) For this part, assume that = 0, that n = 3 p, that W4 =L4 = W5 =L5 = 3W3=L3, and that VT = ;VT . Calculate VG4 as a function of only VG3 , VT , and VDD . Does VG4 depend upon Vi1 and Vi2 ? Explain.
n p p 1 b) Can a di erentialmode halfcircuit be used to calculate Adm and Adm;cm for this circuit? Explain your reasoning, and, if your answer is yes, draw the smallsignal model of the di erentialmode half circuit. c) Calculate Adm and Adm;cm for this circuit. If applicable, do not neglect the body e ect or rds for any of the transistors. d) Can a commonmode halfcircuit be used to calculate Acm and Acm;dm for this circuit? Explain your reasoning, and, if your answer is yes, draw the smallsignal model of the commonmode half circuit. e) Calculate Acm and Acm;dm for this circuit. If applicable, do not neglect the body e ect for any of the transistors. f) Does this circuit require commonmode feedback (i.e., do the DC bias voltages need to be precisely balanced using a feedback circuit to keep the transistors in saturation)? Explain. g) What major advantage does this circuit o er with respect to a resistively loaded di erential ampli er wherein M4 and M5 are absent and each resistor connects the drain of either M1 or M2 to VDD ?
i 2 ECE 164 Analog Integrated Circuit Design First Midterm Exam, November 2, 2004 ECE164 Midterm Exam: Fall 2004 Suppose you are in the following situation. Although you’ve only been working at you new company, ECE164 Incorporated, for about 5 weeks, the honeymoon period is definitely over. The CEO seemed like a nice guy at first, but he’s really starting to annoy you. He assigns new problems to you each week, yet he only comes in from 8:00 to 9:20 am on Tuesdays and Thursdays and spends the whole time lecturing you! You’ve thought about leaving, but your last company, ECE102 Incorporated, was even worse, and you’re not sure where else to go. Things are about to change, though. Working out of your garage in your spare time, you’ve developed a revolutionary new transistorlike device that can be made extremely inexpensively using equipment found around the house. You believe it has the potential to be a replacement for present transistors. You’ve talked to venture capital firms about funding a company to commercialize your device, but they first want you to prove to them that it can be used as an amplifier. Your device has three terminals which you’ve labeled “a”, “b”, and “c”:
c Ic a Ia b and your laboratory test results indicate the following large signal model equations to be quite accurate: 1 −8 V +V I c = e8Vab 1 − e ( cb ab ) 10−6 amps, I a = 0, and 2 for 0 ≤ Vab ≤ 3.0 volts, and 0 ≤ Vcb ≤ 3.0 volts. These equations are sufficiently accurate that even their derivatives are good representations of the corresponding measured quantities. ( ) 1. (20 points) Sketch Ic as a function of Vcb for 0 ≤ Vcb ≤ 3.0 V, first with Vab = 0.8 V, then with Vab = 1.0 V, and finally with Vab = 1.2 V. Draw all three curves on the same set of axes, and on each curve label at least three points with the corresponding values of Ic. (NOTE: for this and the rest of the problems: neatness counts) 2. (40 points) From the large signal model equations given above, derive a smallsignal model for your new device (along of the lines of the MOS transistor small signal model derived in class). As always, be sure to carefully explain your reasoning. 3. (40 points) Devise an amplifier circuit consisting of your new device, a 1 kΩ resistor, a 3 V power supply, and an input voltage source of Vin = VIN + vin, where VIN = 1V is a dc quantity and vin is a small signal voltage that you wish to amplify. Draw the circuit and calculate the smallsignal gain, Av of the circuit (as usual, you must have Av > 1 for the circuit to be useful as an amplifier). 2 ECE 164 Midterm Exam: Fall 1999 ECE164 Analog Integrated Circuit Design First Midterm Exam, November 2, 1999 All of the problems relate to the following circuit. The circuit is widely used in digital logic applications as an inverter. However, it can also be viewed and used as an analog ampli er. Each problem may be solved without relying on the solution to the other problems. You may assume that the input signal frequencies are su ciently low that all capacitances can be ignored. Please be absolutely sure to fully explain your reasoning. Correct answers without justi cation will not receive credit.
VDD M2 + Vi − M1 Vo 1. 25 points Qualitatively sketch Vo as a function of Vi for Vi ranging between 0 and VDD assuming the transistor sizes are such that the transistors are both in saturation for some portion of the input voltage range. Label your sketch to approximately indicate the various operating regions i.e., the cuto , saturation, and triode regions of each transistor as a function of the input voltage. 2. 25 points How should W2 =L2 be chosen as a function of W1=L1 in order to have Vo = VDD =2 whenever Vi = VDD =2. Assume that n = 3p , VTp = ,VTn , and n = p = 0. 3. 25 points Derive an expression for the small signal gain of the circuit when VI is such that both transistors are in saturation. 4. 25 points Derive an expression for the small signal output resistance of the circuit when VI is such that both transistors are in saturation. 2 ECE 164 Midterm Exam: Fall 1998 ECE164 Analog Integrated Circuit Design First Midterm Exam, November 3, 1998 All of the problems relate to the following circuit. Each problem may be solved without relying on the solution to the other problems. You may assume that M1 , M3 are identical transistors, and that the input signal frequencies are su ciently low that all capacitances can be ignored. Please be absolutely sure to fully explain your reasoning. Correct answers without justi cation will not receive credit.
VDD VDD M1 R Vi + − M3 M2 Vo 1. 20 points Derive an expression for Vo as a function of Vi ; ID3 ; k, and VT that is valid when Vi is large enough that M2 is always in saturation and small enough that M1 is always in saturation. You may neglect the channel modulation e ect in this problem. 2. 20 points Derive an expression for the value of Vi that puts M2 on the nominal boundary between the saturation and triode regions in terms of ID3 ; k, and VT . You may neglect the channel modulation e ect in this problem. 3. 20 points Derive an expression for ID3 in terms of R; VDD ; k; and VT . 4. 20 points Derive the smallsignal gain Av = vo =vi. Is your answer consistent with that of Problem 1? Explain. If you were not able to answer Problem 1, explain what your answer to this problem implies about the form of the large signal relationship between Vi and Vo 5. 20 points Derive the smallsignal output impedance of the circuit. 2 ...
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This note was uploaded on 08/26/2010 for the course ECE ece164 taught by Professor Iangalton during the Fall '05 term at UCSD.
 Fall '05
 IANGALTON

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