Lab04s10 - ESE 382 Digital System Design Using VHDL and...

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1 ESE 382 Digital System Design Using VHDL and PLDs Spring 10, Ken Short February 22, 2010 7:07 pm Laboratory 4: Behavioral Architectures Using If-Then-Else, Case, and For-Loop Constructs This laboratory is to be performed the week starting Feb. 28th. Prerequisite Reading 1. Chapter 5 of the text. 2. Data Sheet for DM74LS251 Three-state 1-of-8 Multiplexer Purpose The purpose of this laboratory is to provide you with experience in using three different forms of sequential VHDL constructs in descriptions of a combinational circuit. You will write three differ- ent behavioral architectures for a multiplexer functionally equivalent to the DM74LS251 three- state 1-of-8 multiplexer and implement the design using each approach. The if-then-else, case, and for-loop statements are sequential statements and, therefore, can only appear inside of a process or subprogram. In this laboratory you will create a process statement in the architecture body and the sequential statements will appear inside the process statement. The entirety of a process statement, from its label through all of its included sequential statements to the end process, constitutes a single concurrent statement. Design Tasks The three-state 1-of-8 multiplexer to be designed is functionally equivalent to the DM74LS251 described on the data sheet on Blackboard. You will write a design description using each of the three different approaches. Each description will have the same entity declaration, but different architectures. Use the name
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Lab04s10 - ESE 382 Digital System Design Using VHDL and...

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