LEC-09 - 09 Latches and Flip-flops 3/9/2009 Latches and...

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09 Latches and Flip-flops 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 1 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 1 Latches and Flip-flops Kenneth Short 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 2 Focus ± Memory elements can be described behaviorally or instantiated structurally from a device specific library ± The focus here is on behavioral descriptions of memory elements ± VHDL descriptions for latches and flip-flops, are presented
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09 Latches and Flip-flops 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 2 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 3 Sequential System ± A sequential system’s outputs depend not only on its present input values, but also on the past sequence (history) of its input values ± The history of a sequential system’s input values is characterized by a binary state value stored in its memory elements ± The output of a sequential system is a function of its present input values and present state 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 4 Synchronous vs. Asynchronous ± A sequential system may be asynchronous or synchronous ± The state of an asynchronous sequential system can change value as soon as any of its inputs changes value ± The state of a synchronous sequential system can change value only in response to a clock pulse. A sequential system’s inputs are sampled only at those times marked by the occurrence of a clock pulse ± The values of the inputs at each clock pulse define the system’s input sequence ± The vast majority of sequential systems are synchronous and our interest is limited to systems of that type
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09 Latches and Flip-flops 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 3 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 5 Memory Element ± A single memory element is, by itself, a simple sequential system that stores 1 bit of information ± Has two stable states, corresponding to its storing a 0 or a 1 ± When it stores a 0, it is said to be clear or reset. When it stores a 1, it is said to be set ± Has an output that can be read to determine its present state ± Has inputs that allow it to be placed in either of its states 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 6 Synchronous inputs ± Synchronous inputs, can change the memory element’s state only in response to the occurrence of a clock pulse at the memory element’s clock input ± Synchronous inputs can change value until the next clock pulse without the memory element’s state changing
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09 Latches and Flip-flops 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 4 3/9/2009 © Copyright 2003, 2006 Kenneth L. Short 7 Asynchronous Inputs ± A memory element may also have asynchronous inputs ± Asynchronous inputs allow a memory element to be forced into a desired state independently of it’s clock or synchronous inputs ± Asynchronous inputs are typically used to place a memory element in a known initial state during a system’s power-on reset. This is necessary because the initial state of a latch or
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This note was uploaded on 08/30/2010 for the course ESE 382 taught by Professor Short during the Spring '10 term at SUNY Stony Brook.

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LEC-09 - 09 Latches and Flip-flops 3/9/2009 Latches and...

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