# chap17 - ECEn/CS 224 Chapter 17 Homework Solutions 17.1...

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Last updated: 11/4/2006 ECEn/CS 224 Chapter 17 Homework Solutions 17.1 Design the FSM of Figure 16.5 using a one-hot encoding and reduce the design to gates. Recall that with the one-hot encoding we can easily design the FSM directly from the state diagram, without resorting to transition tables or K-maps. Since there are four states, we need four flip flops. Call the outputs of the flip flips S0, S1, S2, and S3, corresponding the respective states. By inspection of the state diagram, we obtain the following next-state logic: NS0 = S0•Xin + S3•Xin = Xin•(S0 + S3) NS1 = S0•Xin’ + S1•Xin’ + S2•Xin’ + S3•Xin’ = Xin’•(S0+S1+S2+S3) = Xin’ NS2 = S1•Xin NS3 = S2•Xin Notice that by factoring, we can reduce the number of gates required for NS0 without increasing the number of logic levels. Also, we were able to reduce NS1 to Xin’ since we know that, with a one-hot encoding, exactly one of the state bits will be high at any given time. You can also come to this same result by observing that the Xin’ condition always

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## This note was uploaded on 09/02/2010 for the course ELECTRICAL 360 taught by Professor Schultz during the Spring '10 term at BYU.

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chap17 - ECEn/CS 224 Chapter 17 Homework Solutions 17.1...

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