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Unformatted text preview: .18, all or portions of chunks 0, 1, and 8 are allocated, so their level-1 PTEs point to level-2 page tables. Each PTE in a level-2 page table is responsible for mapping a 4-KB page of virtual memory, just as before when we looked at single-level page tables. Notice that with 4-byte PTEs, each level-1 and level-2 page table is 4K bytes, which conveniently is the same size as a page. This scheme reduces memory requirements in two ways. First, if a PTE in the level-1 table is null, then the corresponding level-2 page table does not even have to exist. This represents a signiﬁcant potential savings, since most of the 4-GB virtual address space for a typical program is unallocated. Second, only the level-1 ... 504 CHAPTER 10. VIRTUAL MEMORY table needs to be in main memory at all times. The level-2 page tables can be created and paged in and out by the VM system as they are needed, which reduces pressure on main memory. Only the most heavily used level-2 page tables need to be cached in main memory. Figure 10.19 summarizes address translation with a -level page table hierarchy. The virtual address is partitioned into VPNs and a VPO. Each VPN , ½ , is an index int...
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- Spring '10
- The American