For example figure 1032a shows a case where two

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Unformatted text preview: values might happen to be stored there are not meaningful. Cache. The direct-mapped cache is addressed by the fields in the physical address. Since each block is 4 bytes, the low-order 2 bits of the physical address serve as the block offset (CO). Since there are 16 sets, the next 4 bits serve as the set index (CI). The remaining 6 bits serve as the tag (CT). ¯ Given this initial setup, lets see what happens when the CPU executes a load instruction that reads the byte at address 0x03d4. (Recall that our hypothetical CPU reads one-byte words rather than four-byte words.) To begin this kind of manual simulation, we find it helpful to write down the bits in the virtual address, identify the various fields we will need, and determine their hex values. The hardware perform a similar task when it decodes the address. 506 TLBT 10 TLBI 6 CHAPTER 10. VIRTUAL MEMORY 13 Virtual Address 12 11 9 8 7 5 4 3 2 1 0 VPN Set 0 1 2 3 Tag 03 03 02 07 PPN – 2D – – Valid 0 1 0 0 Tag 09 02 08 03 PPN 0D – – 0D Val...
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This note was uploaded on 09/02/2010 for the course ELECTRICAL 360 taught by Professor Schultz during the Spring '10 term at BYU.

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