For example if then we could partition each matrix

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ¯ ¯ ¯ sizeof(int) == 4. grid begins at memory address 0. The cache is initially empty. The only memory accesses are to the entries of the array grid. Variables i, j, total x, and total y are stored in registers. Determine the cache performance for the following code: 1 2 3 4 5 for (i = 0; i < 16; i++) { for (j = 0; j < 16; j++) { total_x += grid[i][j].x; } } 326 6 7 8 9 10 11 CHAPTER 6. THE MEMORY HIERARCHY for (i = 0; i < 16; i++) { for (j = 0; j < 16; j++) { total_y += grid[i][j].y; } } A. What is the total number of reads? _______. B. What is the total number of reads that miss in the cache? _______ . C. What is the miss rate? _______. Practice Problem 6.16: Given the assumptions of Problem 6.15, determine the cache performance of the following code: 1 2 3 4 5 6 for (i = 0; i < for (j = 0; total_x total_y } } 16; i++){ j < 16; j++) { += grid[j][i].x; += grid[j][i].y; A. What is the total number of reads? _______. B. What is the total number of reads that miss in the cache? _______ . C. What is the miss rate? _______. D. What would the miss rate be if the cache were...
View Full Document

Ask a homework question - tutors are online