Indicate by labeling the diagram the elds that would

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Unformatted text preview: block finally arrives from memory, the L1 cache stores the block in one of its cache lines, extracts word Û from the stored block, and returns it to the CPU. The process that a cache goes through of determining whether a request is a hit or a miss, and then extracting the requested word consists of three steps: (1) set selection, (2) line matching, and (3) word extraction. Set Selection in Direct-Mapped Caches In this step, the cache extracts the × set index bits from the middle of the address for Û. These bits are interpreted as an unsigned integer that corresponds to a set number. In other words, if we think of the cache as a one-dimensional array of sets, then the set index bits form an index into this array. Figure 6.28 shows how set selection works for a direct-mapped cache. In this example, the set index bits ¼¼¼¼½¾ are interpreted as an integer index that selects set 1. set 0: selected set set 1: valid valid tag tag ••• t bits m-1 cache block cache block tag s bits b bits 00 001 set index block offset set S...
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