The memory hierarchy cache block cache block cache

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Unformatted text preview: Compiler Hardware Hardware Hardware Hardware + OS OS AFS/NFS client Web browser Web proxy server Figure 6.23: The ubiquity of caching in modern computer systems. Acronyms: TLB: Translation Lookaside Buffer, MMU: Memory Management Unit, OS: Operating System, AFS: Andrew File System, NFS: Network File System. 6.4 Cache Memories The memory hierarchies of early computer systems consisted of only three levels: CPU registers, main DRAM memory, and disk storage. However, because of the increasing gap between CPU and main memory, system designers were compelled to insert a small SRAM memory, called an L1 cache (Level 1 cache), between the CPU register file and main memory. In modern systems, the L1 cache is located on the CPU chip (i.e., it is an on-chip cache), as shown in Figure 6.24. The L1 cache can be accessed nearly as fast as the registers, typically in one or two clock cycles. As the performance gap between the CPU and main memory continued to increase, system designers responded by inserting an additional cache,...
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