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Unformatted text preview: or memory, performing an operation, and storing results back to a register or memory location. In the actual processor, a number of instructions are evaluated simultaneously. In some designs, there can be 80 or more instructions “in ﬂight.” Elaborate mechanisms are employed to make sure the behavior of this parallel execution exactly captures the sequential semantic model required by the machine-level program. 5.7.1 Overall Operation
Figure 5.11 shows a very simpliﬁed view of a modern microprocessor. Our hypothetical processor design is based loosely on the Intel “P6” microarchitecture , the basis for the Intel PentiumPro, Pentium II and Pentium III processors. The newer Pentium 4 has a different microarchitecture, but it has a similar overall structure to the one we present here. The P6 microarchitecture typiﬁes the high-end processors produced by a number of manufacturers since the late 1990s. It is described in the industry as being superscalar, which means it can perform multiple operations on every clock cycle, and out-of-order meaning that the 222 CHAPTER 5. OPTIM...
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