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Unformatted text preview: ays is to reduce 6.1. STORAGE TECHNOLOGIES 279 the number of address pins on the chip. For example, if our example 128-bit DRAM were organized as a linear array of 16 supercells with addresses 0 to 15, then the chip would need four address pins instead of two. The disadvantage of the two-dimensional array organization is that addresses must be sent in two distinct steps, which increases the access time. Memory Modules
DRAM chips are packaged in memory modules that plug into expansion slots on the main system board (motherboard). Common packages include the 168-pin Dual Inline Memory Module (DIMM), which transfers data to and from the memory controller in 64-bit chunks, and the 72-pin Single Inline Memory Module (SIMM), which transfers data in 32-bit chunks. Figure 6.5 shows the basic idea of a memory module. The example module stores a total of 64 MB (megabytes) using eight 64-Mbit Å ¢ DRAM chips, numbered 0 to 7. Each supercell stores one byte of main memory, and each 64-bit doubleword1 at byte address in main memory is represented by the eight supercells whose corresponding supercell address is ´ µ. In our example in Figure 6.5, DRAM 0 stores th...
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