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Unformatted text preview: locks. Figure 6.22: The basic principle of caching in a memory hierarchy. Similarly, the storage at level is partitioned into a smaller set of blocks that are the same size as the blocks at level · ½. At any point in time, the cache at level contains copies of a subset of the blocks from level · ½. For example, in Figure 6.22, the cache at level has room for four blocks and currently contains copies of blocks 4, 9, 14, and 3. Data is always copied back and forth between level and level · ½ in block-sized transfer units. It is important to realize that while the block size is ﬁxed between any particular pair of adjacent levels in the hierarchy, other pairs of levels can have different block sizes. For example, in Figure 6.21, transfers between L1 and L0 typically use 1-word blocks. Transfers between L2 and L1 (and L3 and L2) typically use blocks of 4 to 8 words. And transfers between L4 and L3 use blocks with hundreds or thousands of bytes. In general, devices lower in the hierarchy (further from the CPU) have lo...
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This note was uploaded on 09/02/2010 for the course ELECTRICAL 360 taught by Professor Schultz during the Spring '10 term at BYU.
- Spring '10
- The American