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mid2w10sol - ECEn 324 Winter 2010 Midterm#2 Solution 1 a b...

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1 ECEn 324 Winter 2010 Midterm #2 Solution 1. Which of the following is NOT true of the Y86 ISA? a. Target addresses for jump instructions are represented as absolute addresses in 4 bytes. b. Instructions with explicit register operands can be as short as a single byte. c. It has no scaled addressing modes. d. Even small immediate values require 4 bytes to represent. Solution: Option a is certainly true: this is the key to being able to predict branches as taken by the end of the cycle on which the instruction is fetched. (Otherwise there would be some calculation required that would take additional cycles.) Choice c is also true: note for example the discussion on page 266 about the difficulty of converting array indexing IA32 code to Y86 instructions. Choice d is also true as Figure 4.2 clearly shows. That leaves us with choice b. It is important to note that an entire byte is always used to encode the register specifiers for instructions that require registers. Therefore, any instruction that explicitly references operands will require at least two bytes. 2. Which of the statements below is true about the combinational logic circuit represented by this HCL code? int Unknown1 = [ A >= B && A >= C : A; B >= A && B >= C : B; 1 : C; ] ; 3. Which of the Y86 instructions below matches this sequence of operations in its sequential implementation? Fetch icode:ifun M 1 [PC] rA:rB M 1 [PC+1] valC M 4 [PC+2] valP PC + 6 Decode valA R[rA] valB R[rB] Execute valE valB + valC Memory M 4 [valE] valA Writeback PC update PC valP a. rmmovl b. mrmovl c. irmovl
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2 d. pushl e. call Solution: With a bit of reflection, the answer should be relatively easy to determine. First, notice that the instruction is writing a register value to memory. That limits the possibilities to rmmovl, pushl, and call, and the latter two can be eliminated by noting that this instruction does not reference the stack pointer. The correct answer is therefore a.
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