If after release how to protect during separation

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: von Arx, University of Michigan Release Process Issues • SUMMiT™ release in an HF solution – Long release times Change in Contact Angle (Θ i-Θ f) – Obey design rules on etch release holes! 60 50 40 30 20 10 0 -10 220 260 300 340 380 420 460 500 540 580 Temperature (C) Chemical A Chemical D Si3 • Drying options: – Air dry – SAM coating to make hydrophobic – Supercritical CO2 – Sublimation drying • Coatings: – SAM coatings – Wear resistant coatings Microsystems Packaging: An Introduction Page 72 © 2003 Sandia National Laboratories temperature dependence of the contact angle of a SAMS coated surface as a function of temperature Advanced Design Issues: Die Separation • Separate before or after release? • If after release, how to protect during separation? – Glass cap – Area around MEMS for temporary protection – Get scribe and break to work • If before release, how are you measuring yield? – Can’t do wafer level test, so then what? • Chip layout on wafer, die size, etc. Microsystems Packaging: An Introduction Page 73 © 2003 Sandia National Laboratories Bulk Micromachined Infrared Imager • Micromachined first • Then break • Then package Device from Dexter Research Center Inc. Microsystems Packaging: An Introduction Page 74 © 2003 Sandia National Laboratories Alternative Die Separation and Handling Technique (Design Rules at End of Handout) • Package MEMS at the wafer level • Then dice and handle them like regular IC die Microsystems Packaging: An Introduction Page 75 © 2003 Sandia National Laboratories Design for “Packagability” of MEMS: • The developer of a MEMS device desires... – a large number of functional, testable, packaged parts – devices that can be operated in a manner that yields useful information for yield/design enhancement • SUMMiT V™ MEMS – need free space to operate – have polysilicon pads for wirebond interconnections – It is logical to assume that these devices will end up in some sort of cavity package (cerdip, TO, etc.) • Sandia has high-rel packaging experience – We like ceramic packages with brazed-on lids Microsystems Packaging: An Introduction Page 76 © 2003 Sandia National Laboratories Your Design Includes the Package! • As part of the design process, the in...
View Full Document

This note was uploaded on 09/02/2010 for the course MEEN 5050 taught by Professor Himanshuj.sant during the Spring '10 term at University of Utah.

Ask a homework question - tutors are online