Lab2Spring2010

Lab2Spring2010 - ECE 25 Introduction Lab 2 3-Bit...

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ECE 25 Lab 2 3-Bit Exclusive-Or Gate Introduction The goal of this lab is to generate our first design using the programmable chip by implementing a 3-bit XOR gate. We also construct the same 3-bit XOR gate on the breadboard by using the NAND gates introduced in Lab 1. Prelab Goal: Use Project Navigator to implement a 3-bit X-OR gate using two 2-input XOR gates. This requires learning the tool. Follow the Project Navigator tutorial on the class website, print out both the schematic of the 3-bit XOR gate and the timing diagram from Modelsim which shows all 8 possible output states. Remember that the inputs and outputs of your circuit need to be labeled using the format listed in the written tutorial (“Using Project Navigator”) on the Lab Web Site. Also remember that the tutorial is an example of a schematic, however it is not the same one that you are being asked to create here; after completing the tutorial, you will have to make a new project or schematic to do this prelab. Do not turn in the tutorial example, only turn in the prelab schematic and modelsim simulation. Failure to follow the labeling procedure will result in a zero grade for the Pre-lab. You also need to hand draw out a schematic for the 3-bit XOR gate using only 2-bit NAND gates from the NAND chip used in Lab 1. Your schematic should have from 8-10 NAND gates, but NO other logic function (OR, AND, INV gates can be created from a NAND gate). If
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This note was uploaded on 09/10/2010 for the course ECE 107 taught by Professor Fullterton during the Spring '07 term at UCSD.

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Lab2Spring2010 - ECE 25 Introduction Lab 2 3-Bit...

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