04 - 24-Aug-105:40 PM Mixed Logic EEL 3701 EEL 3701:...

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24-Aug-10—5:40 PM Mixed Logic 1 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo EEL 3701: Digital Logic & Computer Systems EEL 3701 Menu • Mixed-Logic (aka Direct Polarity Indication) Look into my . .. 1 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo EEL 3701: Digital Logic & Computer Systems EEL 3701 Activation Level •The activation level of a signal is the voltage level at which the signal is considered to be true • Voltage levels are high (H) & low (L); for our chips: >H +5V >L 0V (ground) •An active-high signal is defined as a signal that is true when it is at a high voltage (aka high true) 2 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo >The notation for an active-high signal X is X(H) or X.H active-low signal is defined as a signal that is true when it is at a low voltage (aka low true) >The notation for an active-low signal Y is Y(L) or Y.L
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24-Aug-10—5:40 PM Mixed Logic 2 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo EEL 3701: Digital Logic & Computer Systems EEL 3701 Level Shifters • Level shifters change the activation level of a signal from high to low or from low to high 3 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo Logically , a level shifter does nothing to the signal >If a signal is T (F) at the input side it is all T (F) at the output >( Electrically , level shifter complements , H L) EEL 3701: Digital Logic & Computer Systems EEL 3701 A Little Boolean Algebra Let X=/A • Let X=/A. • If Y=/X, the Y=/(/A)=A •In words: “The complement of the complement of A is A.” 4 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo
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24-Aug-10—5:40 PM Mixed Logic 3 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo EEL 3701: Digital Logic & Computer Systems EEL 3701 Direct Polarity Indication (Mixed-Logic) External logic states v internal logic state • External logic states -vs- internal logic states > Logically , bubble has no effect (it only effects the activation level) >Externally, you must specify signal activation levels, e.g., A(L) or A.L, B(H) or B.H >Internally 5 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo – Match output activation-levels to input activation-level of gates (specified by bubbles) – Then forget about activation levels! EEL 3701: Digital Logic & Computer Systems EEL 3701 Mixed-Logic • At input and output of gate, bubble for active-low and non-bubble for active-high Match bubble to bubble or non-bubble to non-bubble, then variable unchanged (not complemented) Mismatch in bubble/non-bubble means 6 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo complement , i.e. , A(L)=/A(H), B(H)=/B(L)
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24-Aug-10—5:40 PM Mixed Logic 4 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo EEL 3701: Digital Logic & Computer Systems EEL 3701 Mixed-Logic •The voltage on a wire does not change (due to a bubble on an end), but the logical interpretation changes according to the equations: A(L)=/A(H) and B(H)=/B(L) A(L) /A(H) B(H 7 University of Florida, EEL 3701 – File 04 © Drs. Schwartz & Arroyo
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This note was uploaded on 09/11/2010 for the course EEL 3701c taught by Professor Gugel during the Spring '05 term at University of Florida.

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04 - 24-Aug-105:40 PM Mixed Logic EEL 3701 EEL 3701:...

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