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# hw5 - inverter may be needed b Use NOR gates for all four...

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The Hong Kong University of Science and Technology Department of Electronic and Computer Engineering ELEC151 – Digital Circuit and Systems Homework 5 Issue Date: 23-10-2008 Due Date: 31-10-2008 5:00pm *** Except the parts require computer plot, you need to do the homework by hand . *** Please put your assignment into the collection boxes labeled “ELEC151” outside the ECE Departmental General Office, 2 nd Floor, near Lift 25-26 (Outside Rm. 2513). 1. The D latch of Fig.5-6 is constructed with four NAND gates and an inverter. Consider the following three other ways for obtaining a D latch. In each case, draw the logic diagram and verify the circuit operation. a) Use NOR gates for the SR latch part and AND gates for the other two. An
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Unformatted text preview: inverter may be needed. b) Use NOR gates for all four gates. Inverters may be needed. 2. (a) Construct a JK flip-flop, using a D flip-flop, a 3-8 decoder, and a OR gate (b) Construct a JK flip-flop, using a D flip-flop, a two-to-one line multiplexer, and an inverter. 3. Design an edge-triggered D flip-flop with Reset function by NOR gates - On Note 5-34 is a D flip-flop with Reset function by NAND gates - On Note 5-20 is a D flip-flop without Reset function by NOR gates 4 Design a master/slave D flip-flop with Reset function by transmission gates - On Note 5-41 is a master/slave D flip-flop without Reset function by transmission gates...
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• Spring '10
• cy
• Logic gate, Hong Kong University of Science and Technology, JK Flip-Flop, Department of Electronic and Computer Engineering, Reset function

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