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Design of PTAT Current Reference
Jim Hellums
Q1
Q1
R
R
Q2
Q2
Q4
Q3
Iin
Iin
Io
Io
n
n
m
1
1
1
(b)
(a)
The following design equations show why the PTAT circuit (b) on the right above is
better than circuit (a) on the left. We start by writing the KVL equation for the standard
circuit shown in ﬁgure (a).
V
BE
1
=
V
BE
2
+
I
E
2
R
(1)
where
V
BE
for forwardbias is given by,
V
BE
=
V
T
ln
±
I
c
I
s
²
(2)
with
V
T
=
kT/q
being the Thermal voltage. Assuming the bipolar transistor’s current gain,
β
, is large and the same for all transistors, (i.e.
I
B
≈
0), then
I
o
=
I
E
2
, so after we do some
algebra to solve for the output current, we arrive at the following equations:
I
o
R
=
V
T
³
ln
±
I
in
I
s
1
²

ln
±
I
o
I
s
2
²´
(3)
I
o
=
V
T
R
ln
±
I
in
I
s
1
·
I
s
2
I
o
²
(4)
I
o
=
V
T
R
ln
±
I
in
I
o
·
I
s
2
I
s
1
²
(5)
Since the baseemitter diode reverse leakage current
I
s
is a function of the emitter area, and
because Q2 has
n
times the area then
I
s
2
=
nI
s
1
. Therefore we can substitute and get
I
o
=
V
T
R
ln
±
n
·
I
in
I
o
²
(6)
1
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View Full Document Since eqn (6) is nonlinear we will not try to algebraically reduce it any further, but note
that
I
o
is a function of
I
in
. Normally a PNP or PMOS current mirror with an 1:1 ratio is
used to force
I
in
=
I
o
. This gives a supplyindependent, selfbiased current reference circuit
with the well known design equation.
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This note was uploaded on 09/19/2010 for the course EE 7326 taught by Professor Jimhellums during the Spring '08 term at University of Texas at Dallas, Richardson.
 Spring '08
 JimHellums

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