ChargepumpLV - 592 IEEE JOURNAL OF SOLID-STATE CIRCUITS,...

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Unformatted text preview: 592 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 4, APRIL 1998 MOS Charge Pumps for Low-Voltage Operation Jieh-Tsorng Wu, Member, IEEE , and Kuen-Long Chang Abstract— New MOS charge pumps utilizing the charge trans- fer switches (CTS’s) to direct charge flow and generate boosted output voltage are described. Using the internal boosted voltage to backward control the CTS of a previous stage yields charge pumps that are suitable for low-voltage operation. Applying dynamic control to the CTS’s can eliminate the reverse charge sharing phenomenon and further improve the voltage pumping gain. The limitation imposed by the diode-configured output stage can be mitigated by pumping it with a clock of enhanced voltage amplitude. Using the new circuit techniques, a 1.2-V-to-3.5-V charge pump and a 2-V-to-16-V charge pump are demonstrated. Index Terms— Charge pump, high-voltage generator, voltage multiplier. I. INTRODUCTION C HARGE pumps are circuits that can pump charge up- ward to produce voltages higher than the regular supply voltage. Charge pumps have been used in the nonvolatile memories, such as EEPROM and Flash memories, for the programming of the floating-gate devices [1], [2]. They can also be used in the low-supply-voltage switched-capacitor systems that require high voltage to drive the analog switches [3], [4]. Most MOS charge pumps are based on the circuit proposed by Dickson [5]–[7]. As shown in Fig. 1, the MOST’s in the Dickson charge pump function as diodes, so that the charges can be pushed only in one direction. The two pumping clocks and are out-of-phase and have a voltage amplitude of . The value of is usually identical to the supply voltage . Through the coupling capacitors C1–C4, the two clocks push the charge voltage upward through the transistors. Neglecting the boundary conditions, the voltage fluctuation at each pumping node is identical and can be expressed as (1) where is the capacitance of C1–C4, is the parasitic capacitance associated with each pumping node, is the frequency of the pumping clocks, and is the output current loading. When goes from low to high and from high to low, the voltage at node 1 is settled to , and the Manuscript received June 29, 1997; revised October 27, 1997. This work was supported by the National Science Council, Contract NSC-84-2221-E- 009-013, and Macronix International Co., Ltd. J. T. Wu is with the Department of Electronics Engineering, National Chiao- Tung University, Hsin-Chu, 300, Taiwan, R.O.C. K.-L. Chang is with Macronix International Co., Ltd., Hsin-Chu, Taiwan, R.O.C. Publisher Item Identifier S 0018-9200(98)02330-0. voltage at node 2 is settled to , where and are defined as the steady-state lower voltage at node 1 and node 2, respectively. Both MD1 and MD3 are reverse biased, and the charges are being pushed from node 1 to node 2 through MD2. The final voltage difference between node 1 and 2 is the threshold voltage of MD2. The necessary condition for the charge pump to function is that...
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This note was uploaded on 09/19/2010 for the course EE 6378 taught by Professor Hle during the Spring '10 term at University of Texas at Dallas, Richardson.

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ChargepumpLV - 592 IEEE JOURNAL OF SOLID-STATE CIRCUITS,...

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