IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 48, NO. 9, SEPTEMBER 2001
Analysis of Multistage Amplifier–Frequency
Ka Nang Leung and Philip K. T. Mok
, Member, IEEE
Frequency-compensation techniques of single-, two-
and three-stage amplifiers based on Miller pole splitting and
pole–zero cancellation are reanalyzed. The assumptions made,
transfer functions, stability criteria, bandwidths, and important
design issues of most of the reported topologies are included.
Several proposed methods to improve the published topologies
are given. In addition, simulations and experimental results are
provided to verify the analysis and to prove the effectiveness of
the proposed methods.
sation, multipath nested Miller compensation, multipath zero
cancellation, multistage amplifier, nested Gm-C compensation,
nested Miller compensation, simple Miller compensation.
ULTISTAGE amplifiers are urgently needed with the
advance in technologies, due to the fact that single-stage
cascode amplifier is no longer suitable in low-voltage designs.
Moreover, short-channel effect of the sub-micron CMOS
transistor causes output-impedance degradation and hence
gain of an amplifier is reduced dramatically. Therefore, many
frequency-compensation topologies have been reported to
stabilize the multistage amplifiers –. Most of these
topologies are based on pole splitting and pole–zero can-
cellation using capacitor and resistor. Both analytical and
experimental works have been given to prove the effectiveness
of these topologies, especially on two-stage Miller compen-
sated amplifiers. However, the discussions in some topologies
are focused only on the stability criteria, but detailed design
information such as some important assumptions are missing.
As a result, if the provided stability criteria cannot stabilize
the amplifier successfully, circuit designers usually choose the
parameters of the compensation network by trial and error and
thus optimum compensation cannot be achieved.
In fact, there are not many discussions on the comparison of
the existing compensation topologies. Therefore, the differences
as well as the pros and cons of the topologies should be inves-
tigated in detail. This greatly helps the designers in choosing a
suitable compensation technique for a particular design condi-
tion such as low-power design, variable output capacitance or
variable output current.
Manuscript received March 9, 2000; revised February 6, 2001. This work
was supported by the Research Grant Council of Hong Kong, China under grant
HKUST6007/97E. This paper was recommended by Associate Editor N. M. K.