MOS_Diff_LNA_tutorial - Sheet 1 of 14 MOS Differential LNA...

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Sheet 1 of 14 MOS Differential LNA Design Tutorial J P Silver E-mail: john@rfic.co.uk 1 ABSTRACT This tutorial describes the theory and design on a MOS Differential Low noise amplifier using source de-generation. A worked example is given together with the associated Agilent ADS simulation circuits and plots. 2 INTRODUCTION The MOS LNA Design tutorial describes the design of a single stage LNA using source degeneration technique to provide a good noise match. A cascade output stage was added to the source degenerated stage provide improved gain & reverse isolation. This tutorial describes the design of a differential LNA using the same design specification and device models. There are several advantages in using a differential de- sign. Firstly, the virtual ground formed at the ‘tail’ re- moves the sensitivity to parasitic ground inductances, which makes the real part of the input impedance purely controlled by the source degeneration inductance ( Ls ). Secondly the differential amplification of the signal en- sures attenuation of the common mode signal, in most systems this common mode signal will be noise! Thirdly, the use of Gilbert mixers and image rejection schemes require to be fed from a differential source. 3 LNA SINGLE-STAGE DESIGN The design equations are the same as for the single stage LNA design and are summarized below: [] gs m s CGS LS gs s gs m s C .g L Ra Where X - X j Ra Rg Rin as written - re be Can ω C 1 ω L j C .g L Rg Rin = + + = + + = Therefore, the impedance of the MOSFET without feed- back is: CGS CGS jX Rin jX Rg Rin = = Adding series feedback adds the following term to the original input impedance: jX Ra LS + Additionally, another inductor is added in series with the gate Lg that is selected to resonate with the Cgs Capacitor. What we are trying to achieve is: 0 ω C 1 ω L j ie Cgs out cancels it frequency resonant the at that so designed is Lg ohms. 50 say be may Rin Where C .g L Rin gs s gs m s = = In most LNA designs the value of Ls is picked and the values of gm and Cgs are calculated to give the required Rin. 4 DESIGN EXAMPLE The aim of this example is to design step-by-step a nar- row band LNA (Low noise amplifier) to work over the Bluetooth frequency band. A summary of the required specification for the LNA is given in Table 1 . Parameter Specification Units Frequency 2.45 to 2.85 GHz Noise Figure <3.5 dB Voltage Gain >20 dB Power Gain >10 dB Power consumption <100 mW Source/load impedance 50 ohms Load Capacitance 0.4 pF Table 1 Required specification for the Bluetooth front end LNA . For this design we will be using the Agilent CMOS14 0.5um process that allows a minimum gate length of 0.6um. The schematic of the single ended LNA (half of the final differential LNA design) is shown in Figure 1 .
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Sheet 2 of 14 Rs = 50 Lg M1 Using Agilent CMOS14 process Vbias Ls Lbias Vcc +1.5V Figure 1 Initial single-stage LNA schematic 4.1 STARTING VALUE OF DE- GENERATION INDUCTOR LS.
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This note was uploaded on 09/19/2010 for the course EE 7V88 taught by Professor Dr.karba during the Fall '09 term at University of Texas at Dallas, Richardson.

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MOS_Diff_LNA_tutorial - Sheet 1 of 14 MOS Differential LNA...

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