bpb - - Design : Register File (Dispatch Unit) - Project :...

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------------------------------------------------------------------------------ -- -- Design : Register File (Dispatch Unit) -- Project : Tomasulo Processor -- Entity : register_file -- Author : kapil -- Company : University of Southern California -- Last Updated : June 28, 2008 ------------------------------------------------------------------------------- -- -- Description : 2 - bit wide / 8 deep -- each 2 bit locn is a state machine -- 2 bit saturating counter -- 00 strongly nottaken -- 01 mildly nottaken -- 10 mildly taken -- 11 strongly taken -- ----------------------------------------------------------------------------------- -------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ----------------------------------------------------------------------------------- -------------------------- entity bpb is port ( clk_bpb : in std_logic; reset_bpb : in std_logic; ---- rob ------- RobUpdBranch : in std_logic; -- indicates that a branch is processed by the top of the rob and gives the pred(wen to bpb) DisRobUpdBranchaddr : in std_logic_vector(2 downto 0);-- indiactes the last 3 bit addr of the branch beign processed by top DisRobBranchoutcome
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bpb - - Design : Register File (Dispatch Unit) - Project :...

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