Alu - -library IEEE use IEEE.STD_LOGIC_1164.ALL use IEEE.STD_LOGIC_ARITH.ALL use IEEE.STD_LOGIC_SIGNED.ALL-entity ALU is generic tag_width port

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Unformatted text preview: -----------------------------------------------------------------------------library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_SIGNED.ALL; -----------------------------------------------------------------------------entity ALU is generic ( tag_width ); port ( alu_in1 alu_in2 alu_op downto 0); issueque_integer_tag alu_out downto 0); alu_branch alu_br_taken alu_tag_out ); end ALU; architecture comput of ALU is begin alu_tag_out <= issueque_integer_tag; ALU_COMPUT: process (alu_in1, alu_in2, alu_op) begin alu_branch <= '0'; alu_br_taken <= '0'; case alu_op is when "000" => alu_out <= when "001" => alu_out <= when "010" => alu_out <= when "011" => alu_out <= when "100" => alu_out(31 : integer := 6 : in std_logic_vector(31 downto 0); : in std_logic_vector(31 downto 0); : in std_logic_vector(2 : in std_logic_vector(4 downto 0); : out std_logic_vector(31 : out std_logic; : out std_logic; : out std_logic_vector(4 downto 0) alu_in1 + alu_in2; alu_in1 - alu_in2; alu_in1 and alu_in2; alu_in1 or alu_in2; downto 1) <= (others => '0'); if ( alu_in1 < alu_in2 ) then alu_out(0) <= '1'; else alu_out(0) <= '0'; end if; when "101" => alu_branch <= '1'; if(alu_in1 = alu_in2) then alu_br_taken <= '1'; else alu_br_taken <= '0'; end if; when others => alu_out <= (others => '0'); end case; end process ALU_COMPUT; end architecture comput; ...
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This note was uploaded on 09/26/2010 for the course EE 596 at USC.

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Alu - -library IEEE use IEEE.STD_LOGIC_1164.ALL use IEEE.STD_LOGIC_ARITH.ALL use IEEE.STD_LOGIC_SIGNED.ALL-entity ALU is generic tag_width port

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