picoblaze_test -...

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Unformatted text preview: -------------------------------------------------------------------------------- written by Prasanjeet Das-- Module to test the working of PicoBlazelibrary ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all;library UNISIM;use UNISIM.VComponents.all; -- Xilinx primitive BUFGPentity picoblaze_test isport (clk_port: in std_logic;sw0, sw1, sw2, sw3, sw4, sw5, sw6, sw7: in std_logic;btn3: in std_logic; -- RESET buttonbtn2: in std_logic; -- not really needed here, but ..btn1, btn0 : in std_logic; -- used to generate interruptsLD7, LD6, LD5, LD4, LD3, LD2: out std_logic; LD1, LD0: out std_logic; ca, cb, cc, cd, ce, cf, cg, dp: out std_logic;AN0, AN1, AN2, AN3: out std_logic;St_ce_bar, St_rp_bar, Mt_ce_bar, Mt_St_we_bar, Mt_St_oe_bar : out std_logic -- Nexys2);end picoblaze_test;------------------------------------------------------------------------------architecture picoblaze_arc of picoblaze_test is------------signal RESET,resetb: std_logic; -- pressing btn3 and btn2 together means RESETsignal BCLK: std_logic; -- buffered clocksignal clk : std_logic; -- divided clock...
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picoblaze_test -...

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