kcpsm3

kcpsm3 - - PicoBlaze - Constant (K) Coded Programmable...

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-- PicoBlaze -- -- Constant (K) Coded Programmable State Machine for Spartan-3 Devices. -- Also suitable for use with Virtex-II(PRO) and Virtex-4 devices. -- -- Includes additional code for enhanced VHDL simulation. -- -- Version : 1.30 -- Version Date : 14th June 2004 -- Reasons : Avoid issue caused when ENABLE INTERRUPT is used when interrupts are -- already enabled when an an interrupt input is applied. -- Improved design for faster ZERO and CARRY flag logic -- -- -- Previous Version : 1.20 -- Version Date : 9th July 2003 -- -- Start of design entry : 19th May 2003 -- -- Ken Chapman -- Xilinx Ltd -- Benchmark House -- 203 Brooklands Road -- Weybridge -- Surrey KT13 ORH -- United Kingdom -- -- chapman@xilinx.com -- -- Instruction disassembly concept inspired by the work of Prof. Dr.-Ing. Bernhard Lang. -- University of Applied Sciences, Osnabrueck, Germany. -- ----------------------------------------------------------------------------------- - -- -- NOTICE: -- -- Copyright Xilinx, Inc. 2003. This code may be contain portions patented by other -- third parties. By providing this core as one possible implementation of a standard, -- Xilinx is making no representation that the provided implementation of this standard -- is free from any claims of infringement by any third party. Xilinx expressly -- disclaims any warranty with respect to the adequacy of the implementation, including -- but not limited to any warranty or representation that the implementation is free -- from claims of any third party. Furthermore, Xilinx is providing this core as a -- courtesy to you and suggests that you contact all third parties to obtain the -- necessary rights to use this implementation. -- ----------------------------------------------------------------------------------- - -- -- Format of this file. --
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-- This file contains the definition of KCPSM3 as one complete module with sections -- created using generate loops. This 'flat' approach has been adopted to decrease -- the time taken to load the module into simulators and the synthesis process. -- -- The module defines the implementation of the logic using Xilinx primitives. -- These ensure predictable synthesis results and maximise the density of the implementation. -- The Unisim Library is used to define Xilinx primitives. It is also used during -- simulation. The source can be viewed at %XILINX %\vhdl\src\unisims\unisim_VCOMP.vhd -- ----------------------------------------------------------------------------------- - -- -- Library declarations -- -- Standard IEEE libraries -- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; library unisim; use unisim.vcomponents.all; -- ----------------------------------------------------------------------------------- - -- -- Main Entity for KCPSM3 -- entity kcpsm3 is Port ( address : out std_logic_vector(9 downto 0); instruction : in std_logic_vector(17 downto 0); port_id : out std_logic_vector(7 downto 0); write_strobe : out std_logic; out_port : out std_logic_vector(7 downto 0);
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This note was uploaded on 09/26/2010 for the course EE 596 at USC.

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kcpsm3 - - PicoBlaze - Constant (K) Coded Programmable...

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