This preview shows pages 1–2. Sign up to view the full content.
This preview has intentionally blurred sections. Sign up to view the full version.View Full Document
Unformatted text preview: pMOS logic From Wikipedia, the free encyclopedia Jump to: navigation , search pMOS logic uses p-type metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits . pMOS transistors have three modes of operation: cut-off, triode, and saturation (sometimes called active). The p-type MOSFETs are arranged in a so-called "pull-up network" (PUN) between the logic gate output and positive supply voltage, while a resistor is placed between the logic gate output and the negative supply voltage. The circuit is designed such that if the desired output is high, then the PUN will be active, creating a current path between the positive supply and the output. While pMOS logic is easy to design and manufacture (a MOSFET can be made to operate as a resistor, so the whole circuit can be made with pMOSFETs), it has several shortcomings as well. The worst problem is that a DC current flows through a pMOS logic gate when the PUN is active, that is whenever the output is high. DC current flows through a pMOS logic gate when the PUN is active, that is whenever the output is high....
View Full Document
- Spring '10