IRWIN 9e 3_72 - Irwin, Basic Engineering Circuit Analysis,...

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Unformatted text preview: Irwin, Basic Engineering Circuit Analysis, 9/E 1 3.72 Using loop analysis. find V,. in the network in Figs P3.72. 2 k1! Figure P3.72 SOLUTION: 2 kl! 2 RH KVL‘. 6: 1k1’+ ikl"+1k(-1) jk<13’lq)+ik(l3'ly)’il<<Il—Ia):6 Chapter 3: Nodal and Loop Analysis Techniques Problem 3.72 2 Irwin, Basic Engineering Circuit Analysis, 91E L- 11‘ IL + 3L Is ‘ i k ; ;_1‘.’:E_s:,§j ____,..———v— KVL'. 2k I‘.r ikI.+ ins—+91 IL: l2. 21(1‘ —r IS- +2klzz '2. W 2k 1' —r I3 - it qufl Wnfi \‘Im—Iz. 3"4'm 1L1: " - 1k 11+ Bic—£3: 11: gm): 1k 15,: g iii“ 3:13 -ikigjj .2k1l + 2k12+ii¢13-ik(»2m)riig§_= l2— Olfi' 01:2~ inf ikC—lm)'\’ikl— ; i2 “.1”. I; f0i3+ OIS— = "'Lfm OI" iiLIl .\. Ski‘s '1.ng : 4 2n, +9.)ch elm“ lug: i0 "83mfi V0 = ii‘(I§) : ik<7-57m) V0 7, 7' 57'\/ Problem 3.72 Chapter 3: Nodal and Loop Analysis Techniques ...
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This note was uploaded on 10/04/2010 for the course ECE ECE212 taught by Professor Micahstickel during the Fall '10 term at University of Toronto- Toronto.

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IRWIN 9e 3_72 - Irwin, Basic Engineering Circuit Analysis,...

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