lect4_notesC10

lect4_notesC10 - Foundations of Embedded Systems A Term...

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Unformatted text preview: Foundations of Embedded Systems A Term Fall 2008 Lecture #4: MSP430 Architecture and Memory Organization Reading for Today: MSP430 User's Guide Ch 1, 3.1—3.2 Reading for Next Class: MSP430x4xx User Guide Ch 9, 1, 3.1-3.2 Homework #1 (on the web): Due Tomorrow (At beginning of class!) Lab #0 (on the web): Due 9/9/08 in class Last class: There are a number of standard formats for encoding data into binary representations for use inside computers. Examples include Characters (ASCII) = 1 byte characters Integers = Unsigned, 2's comp, Sign-magnitude, BCD Fractional numbers = Fixed point, Floating point (IEEE 32—bit) This Class: Finish Floating Point and Endian discussion >> An overview of the architecture of the MSP430F449 microprocessor Rea“! dosh; Ln In a Programming course — Typically its all about the code M can 9 ,, lob-{.e ék‘kx >> Learn syntax of a high level language & logical and algorithmic approaches We dAj' to solving some (common) problems 00* M I S 6‘ >> Use a very high level view of a computer ause Wings like HOH.|'L0( loops Qr‘tUrxwx e‘lr‘w— OPS \(l “men C(Sf $60.er , 50" + C [cu la'ffl 30{*warei 4' gpwr'A—e lacuna 4t Stan‘cckx cerredlj 4AA ‘\+ col“ bots cerJrct‘m ruvx \ . . _ (3 .‘ Lonc+xovxctl.iiesl_ :>In9fi: rad“, befitck , C c - D 3.) Od+pu+f (span-bk); SEAdC )1 PO'I‘CK 3 y Developing SW for embedded systems requires much more in depth knowledge of target microprocessor “91962:, 4n; know Mal. unéer5+ané AKCHlTECHURE 0-? Hi ProcesSczr How are (042 4- Axlk sieved ? Hm...) muck memory? chd' +3995 o—C «Memdflj? General Microprocessor System HW Architecture: Ang‘ufi n5 *kait is g not memorts Peripherals (1/0 devices, e+C'\ CPU 2 Central Processing Unit: Core or brains of computer 1? Executes ’Vrog ram ‘msiroc‘l'lon 5 ‘5) 'Proviéfs +‘\m‘.v\c3 => COA*~IO\S/é‘ued$ Overview“ 6; memor‘t drperlpkeracl S W 2 Stores binary information :>Uf\cl€\r carvlrol 0: CPU (memorw 25 DOME!) ‘XI ==> Q Mach/x +1985 NOfi-voioj'xlt : (POM/ FlOLSkB = C04: HeMAOV-‘j Vol g +\ 1e = (RAM/m .—. Dofix Memor‘fi mm = Everything that's not memory... HA ‘Hhe :) 'P’OVV‘e \Mecuxs o5; eackamcfuwj AQ‘LCK uJI “Gui—Sale mom" (1—0 Alta/mew ( =7l/O Races 75 slm‘.\ctr+o Mew/rand l4cce$5 m 930 (Mew/10in Mappeé Perjphera/SB >> CPU, Memory and other Peripherals are connected through data lines, address lines _ M ‘— and control hnes ”we... General (PC) Computing Hardware/Software Hierarchy u) ha+ «4 0L) probate Its Applications M use M054“ 0 Me A (US$30: , M03 \Lh ' WOW) Operating System = User Interface (mm x 9. max, MACOSX System SW = Interface to HW Device 1Drivers. B l O S HW Layer = CPU, Mem., peripherals “frac‘Hol/x H Aware Ahs (/L/ qr Lou/er >> Gets “squashed” in an embedded system... . \ =) 13?? \ICLCHOA 5“"‘Jvl‘ur'3 c\ose\c§ Ln'tefirccled co't-Hx HLO Leggker =>1/O \ikehs 1‘0 be Lark'h‘tnc‘) \Dfi'lC VOJUCS J‘O 'P-IAS 0“: HP (1,9. *0 ?ij§3 < J4 P .-: wttcvo processovw :> L\‘\'+(e &r DO no Pv‘xN‘L‘gQfl UuJV‘aPPIA3“ 04’ 0" senAD $9vxc4‘toutad'IIj >> There are 2 common architectures used by microprocessors/microcontroller systems --> Von Nuemann (or IAS or Princeton) Architecture —— first used for LAS Computer (~1952) --> Harvard Architecture —— first used in Harvard Mark I (~1944) UseA btd Mas-t RtSC. Processoms C Harvard Architecture — Separate memory address spaces for code and data Bane-£14 8! 'IAS‘H‘UCt‘ton gek K + Add?“ rem A hQPPEM } A pqu(/e{ (bed-dew P'tpe‘lfiin \ DAAWK AAA? :) IA$+ruCHOIA “4 amen; FETCH , Read/Urdu? (agromqh r. (H) ( Proc‘ mm Ranch on‘x Carvl'fo D 7Von Nuemanm Architecture — Single memory address spaces for code and data ( Ms" M Ms’PqBo uses Yon NVemkmx Ardx. “-7 3ivx6|e .DcA’ék bus 5) 37"“3” address bus => 37Mp\e_y—’ more {3&5le (Kiev fleece +'OIM€‘MDIN.3 =97 flask is easier +0 implemen—l— because 1:an WrH-e +0 CODE «(grass Space. >> MSP430X44X uses Von Neumann architecture XIN XOUT DVCC! 1C" M9351: Alice A115 55 F8? :‘WMl P1 P2 F3 P4 P5 P5 .._ _____.L__L._ __J.__L_..__ _ XTZW XTZ‘GUT l MAB, | _ “ 4BR I m5 ‘ Incl, 15§Fieg ? a g: _ . 3 . = g , : l MSE 158% ' I . . : Cow ’ME \ flatware _ TCP’ MUEfigiEgr Watmdog I Timer_ B7 I Tamer; A3 _ l ‘ fine: a ‘ -‘mm. ‘ ’. ~‘f SCCReg “M" liiéiifiéé ma TDQF'D: m A3 : M emu“ Adair 30.5 mp 3 = “Emmi! DA+¢~ 305 >> MSP 430 family contains over 40 versions of this CPU with various memory/peripheral configurations -- “System on a Chip” XX >> We 11 be using MSP430F449 -- 60 KB Flash memory (code) —— 2 KB RAM (data) -- LCD controller —— Hardware multiply, UART, and a slew of other peripherals (Timers, ADC, comparator, general 10 ports...) =) 8 dwwmeJ: o? \2 \nk’r Rumba l-o 515’. LA Convey-rev =7 Timer A») T‘umer 9) AAA Lough,“ bob Timer =) (0 I/O Par-LS from binurb Clq/‘lég ——> ( COM pawlkor‘ (la COMpav1n% Vallifi€$§ ...
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