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lecture19 - FoundationsofEmbeddedSystems CTermSpring2010

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Foundations of Embedded Systems C Term Spring 2010 Reading for Today: User's Guide Ch 3.3,3.4 Reading for Next Class: User's Guide Ch 3, EW430_AssemblerReference.pdf Lab #3 (on Web) :                  Report due Tuesday 2/23/2010 HW #5 (on Web): Due Friday 2/26/2010  Last Class:   Software Architecture of a  P:  Everything you need to know program it  1) CPU Registers   2) Memory model   3)  Address modes    Assembly Instructions are mapped 1-to-1 with machine's binary opcodes     label     < instruction mnemonic >    src, dest   ;  comments                              CPU Registers in Detail:   >>  PC, SP, SR contain  all  the information used to control the flow or program execution        R0 = PC = Program Counter  –  Controls the flow of program execution! --> Holds the address of the NEXT instruction to be fetched --> Incremented Automatically by the CPU  (always even!) --> DON''T MESS with the PC! Use jumps and branches, function calls and/or interrupts to change  program flow       R1 = SP = Stack Pointer   --> Holds address for the Top of the Stack  --> Stack is the program's scratch pad used during execution --> SP usually initialized to highest word of RAM = 0A00h in MSP430 --> Stack builds down (i.e. SP decrements as things are PUSHed onto stack) --> DON'T MESS with the SP   use PUSH and POP,  CALL and RET,  Interrupts and RETI --> We'll come back to the SP!     
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lecture19 - FoundationsofEmbeddedSystems CTermSpring2010

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