BME303_lecture7 - BME303 Intro. to Computing MOS Transistor...

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BME303 Intro. to Computing • MOS means M etal-O xide S emiconductor • CMOS indicates use of C omplementary types: N(egative) and P(ositive) MOS Transistor 2 0 volts at Gate: open 0 volts at Gate: closed 2.9 volts Gate: closed 2.9 volts at Gate: open n-type: Gate = “1” is on p-type: Gate = “0” is on
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BME303 Intro. to Computing 3
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BME303 Intro. to Computing Protein Expression Basics • RNA polymerase (RNAP) binds to promoter • RNAP transcribes gene into messenger RNA • Ribosome translates messenger RNA into protein 4 Z Z Promoter Z Gene Protein Transcription RNA Polymerase DNA Translation Messenger RNA
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BME303 Intro. to Computing Regulation Through Repression • Repressor proteins can bind to the promoter and block the RNA polymerase from performing transcription • The DNA site near the promoter recognized by the repressor is called an operator 5 • One gene can code for repression protein enabling regulatory another gene Z Promoter Z Gene R Gene R R R Promoter Transcription Translation DNA Binding RNA Polymerase
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BME303 Intro. to Computing Transcriptional Logic 6
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BME303 Intro. to Computing Molecular electronics 7
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BME303 Intro. to Computing Programmable Logic Array (PLA) A B C 0 0 0 Connections Building blocks such as the full adder 8 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 AND Array
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BME303 Intro. to Computing Logical Completeness •Can implement ANY truth table with (AND, OR, NOT). A B C D 0 0 0 0 1. AND: combinations at yield a "1" in the 9 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 that yield a "1" in the truth table. 2. OR: the results of the AND gates.
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BME303 Intro. to Computing 2 Types of Logic Structures 1. Combinational Logic Circuit output depends only on the current inputs Stateless “Decision element” 10 2. Sequential Logic Circuit output depends on the sequence of inputs (past and present) stores information (state) from past inputs
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BME303 Intro. to Computing Problem Language Algorithms Data Path Memory Storage Elements R-S Latch Gated D latch Register Devices, Circuits, … 11 Machine (ISA) Architecture Micro-architecture Circuits Devices Logic Structures Decoder Mux (multiplexer) Adder Logic Gates NOT OR AND Other gates Transistors Bottom Up
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BME303 Intro. to Computing R-S Latch: Simple Storage Element • R is used to “reset” or “clear” the element – set it to zero. • S is used to “set” the element – set it to one. 1 1 0 1 0 1 12 If both R and S are one, “out” could be either zero or one. – “quiescent” state -- holds ( STORE ) its previous value – note: if a is 1, b is 0, and vice versa 1 0 1 1 0 1 0 1
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Clearing the R-S latch • Suppose we start with output = 1, then change R to zero. 1
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BME303_lecture7 - BME303 Intro. to Computing MOS Transistor...

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