BME303_lecture8 - BME303 Intro. to Computing Chapter 4: Von...

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BME303 Intro. to Computing Chapter 4: Von Neumann Model
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BME303 Intro. to Computing ata paths, von Neumann model… Problem Data paths, von Neumann model… Algorithms Language achine (ISA) Architect re Up Machine (ISA) Architecture Micro-architecture Bottom U LC-3: Little Computer 3 Circuits 2 Devices
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BME303 Intro. to Computing The von Neumann achine Model Machine Model June 1945: John Von Neumann published a paper, in which he presented all of the basic elements of a stored-program computer: John von Neumann Copyright (c) 1997. Maxfield & Montrose Interactive Inc. 1. A calculating unit capable of performing both arithmetic and logical operations on the data. 2. A memory containing both data and instructions. Also to allow both data and instruction memory locations to be read om and written to in any desired order from, and written to, in any desired order. 3. A control unit, which could interpret an instruction retrieved 3 from the memory and select alternative courses of action based on the results of previous operations.
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BME303 Intro. to Computing on Neumann Model Von Neumann Model Memory AR DR Processing Unit put MAR MDR LU EMP Input Output ALU TEMP Control Unit * keyboard * monitor PC IR 4
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BME303 Intro. to Computing us and Cache Bus and Cache Frontside bus : The bus that connects the CPU to main memory on the Backside bus : A microprocessor bus that connects the CPU to a Level 2 cache sually at the full speed of CPU motherboard. Fraction of speed of CPU usually at the full speed of CPU evel 1 cache caches are built into the architecture of microprocessors Level 2 cache , cache memory that is external to the microprocessor. In eneral, L2 cache memory, also called the secondary cache resides on Level 1 cache : caches are built into the architecture of microprocessors. g, y , y , a separate chip from the microprocessor chip. Although, more and more microprocessors are including L2 caches into their architectures. 5
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BME303 Intro. to Computing emory Memory 2 k x m array of stored bits address contents – Chapter 3 example: 2 2 x 3 – Today’s typical computer: 2 28 x 8 = 256 MB –LC3 2 16 x 16 0000 0001 0010 011 0000 0101 •Address – unique ( k -bit) identifier of location •Contents 0011 0100 0101 0110 0000 0010 m -bit value stored in location Basic Operations: OAD 1101 1110 1111 1010 0010 LOAD read a value from a memory location STORE write a value to a memory location 6 y
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BME303 Intro. to Computing terface to Memory Interface to Memory How does processing unit get data to/from memory? •M A R : Memory Address Register D R : Memory Data Register MEMORY AR DR MAR MDR To LOAD a location (A): 1. Write the address (A) into the MAR. 2. Send a “read” signal to the memory. A Read/ data 7 3. Read the data from MDR. LOAD
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BME303 Intro. to Computing terface to Memory Interface to Memory How does processing unit get data to/from memory?
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BME303_lecture8 - BME303 Intro. to Computing Chapter 4: Von...

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