# hw6 - EE114 Autumn 09/10 R Dutton Page 1 of 6...

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EE114 Autumn 09/10 R. Dutton Page 1 of 6 HOMEWORK #6 (Due: Friday, December 4, 2009, noon PT) In this problem set, please refer to EE114 technology device parameters from lecture 7 slide 12 whenever you need device constants in your calculations, except where you are told to explicitly ignore terms. 1. Consider the amplifier circuit shown below (i.e. somewhat similar to the second stage architecture from Lecture 25, Slide 18). All NMOS and PMOS devices are assumed to have identical W/L values and operate in the saturation region. Neglect the back-gate effect (Gamma=0) for all transistors and consider output conductance (symbolically) only for small- signal ac impedance calculations. a) Assuming that I(M 1A )=I(M 2A )=75 A and MagicBattery1=1.1V, determine the gate overdrive (V OV ) of the NMOS devices as well as the minimum dc output voltage level (numerical value) for which M 2B remains saturated. b) Determine the range of voltages for which MagicBattery2 allows the circuit to work properly (keeping all devices saturated). Here we assume that the upper current source has a minimum voltage across it of 200mV. [Note: in a real circuit common-mode feedback would be needed to keep the operating point stable. This issue is not addressed or required for you to solve the problem, but circuit would never work in SPICE or a real application as shown] c) Determine symbolically the ac small-signal resistances R o2 and R o1 as shown. Simplify your analysis by assuming g m r o >> 1, stating clearly where you use the approximation. Transistor Parameters : M1=M2 : W/L=48 KP=50 A/V 2 , V t =0.5V, (Gamma)=0 (g mNMOS , r oNMOS ) M3 : W/L=48 KP=25 A/V 2 , |V t |=0.5V, (Gamma)=0 (g mPMOS , r oPMOS ) I BIAS =150 A M 2A V DD =3V v i MagicBattery1 MagicBattery2 M 1A M 1B M 2B R o1 R o2 v min =0.2V M 3a M 3b v i (dm) v o

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hw6 - EE114 Autumn 09/10 R Dutton Page 1 of 6...

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