f10.sg1 - CPSC 330 Spring 2010 Study Guide for Exam 1...

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CPSC 330 - Spring 2010 Study Guide for Exam 1 Coverage: introduction, performance, combinational and sequential logic 1. Be able to define or match these terms. (Definitions can typically be found in chapter 1, but some other locations are noted.) General technical terms bit byte word kilo mega giga tera peta exa milli micro nano pico embedded computer desktop computer server supercomputer instruction set architecture (ISA) memory RAM cache memory primary memory / main memory secondary memory magnetic disk / hard disk transistor wafer die integrated circuit / chip Performance terms throughput execution time (response time) CPU execution time (CPU time) user CPU time system CPU time clock frequency (Hertz) clock cycle clock cycles per instruction (CPI) workload
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SPEC benchmarks Logic terms combinational logic sequential logic minterm (product term) sum of products form DeMorgan's theorems Karnaugh maps don't care gate glitch race hazard (race condition) number of gate levels (circuit depth) fan-in fan-out propagation delay programmable logic array (PLA) decoder multiplexer (mux) half-adder full-adder ripple-carry adder ALU latch flip-flop master-slave edge-triggered RS latch JK flip-flop D flip-flop register shift register binary counter modulo-(2**n) counter saturating up and down counter ring counter 2. Be able to: A. Give representative values for current machines: i. CPU clock frequency ii. size of main memory iii. size of a hard disk B. Use the standard power-of-two and -ten prefixes in equations. C. Calculate execution time using IC, CPI, and clock cycle time. D. Calculate average CPI. E. Explain why the SPEC benchmarks are better for performance evaluation
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f10.sg1 - CPSC 330 Spring 2010 Study Guide for Exam 1...

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