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Lecture_19_Handout

# Lecture_19_Handout - MOSFET CS Amplifiers with Active Loads...

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Unformatted text preview: MOSFET CS Amplifiers with Active Loads CMOS Common Source Amplifier Q3 [REF Figure 1 in the CMOS common source amplifier shown in figure 1 biases a single NMOS transistor with a PMOS current mirror used as an active load. We begin our analysis converting the output characteristic of 02 into the load line for the output characteristic of Q1. The output characteristic for 02 is shown in ﬁgure 2. i Qgiﬁ inn triodc saturation Slope m m 0 (V56 “ lvtpl) V56 1; Figure 2 We are able to superimpose the load curve above on top of the output characteristic for Q1 by using the following equations: ldl :l V1331 = VDD "V Qt in triode ] les tion _ , ,7 v6.91: V18 "651 = VIA Von "051 = y0 VDD ‘ (V56 ’ We!) Figure 3 We can then convert this figure relating iand v0 to the transfer characteristic, which relates v0 to v; as shown in figure 4. V00 “ (V30 " Ivy)” 1 Q, Off 11 Q1 insaturation III { 91 in saturation Q; in saturation xv{ Q; in mm: l l i g Q; in triads i l g in saturation Figure 4 This circuit has about the same characteristic as the CMOS logic inverter}: In fact this circuit acts exactly like a logic inverter if the input signal ranged from 0V to VDD as it would in a digital circuit. However, because we are inputting a small ac signal into the gate of transistor 01, we are able to utilize the gain in region III to make this circuit an amplifier. Figure 5 in order to have the ampliﬁer operate in region Hi, we must ﬁrst bias each transistor 50 that it is in saluratlen. in order to do this, we must create a DC voltage at the gate of (31 to prevent it from going inle cutoff. Also we can use a resistor to create the reference surrent lREF. Also in order to get a full range of amplification on 1/0, it is best to bias it so that the offset value is at approximately Vim/2.1 Finally after all of these factors are taken into account, one can then manipulate these bias values to maximize the small signal parameters used in the small signal analysis. Large-signal analysis for operation in region ll! (both devices in saturation): 1 2K” V __Vn 2 1+VDSlszn(v _V;n)2[1+10_] D, (as; Jl V , VA” An iD2=Kp(VSG"‘{V 02 1+VSD2 ~[REF ”w tp VAPI — EVAPI ZDI : 1D2 :3 Kn (V1 “‘ Kn)2[1+ ii] : [REF 1+ (TV/AVG) (V —v) [REF 1"” DIDVAP' 0 V V v0: An 11.01 i. [REF 1+_ZQI_L ”Kzz(Vr"K,z)2 VAN +1149)! [REF ’VAPI wlzmr' K 2111-; {KW K _1 C (ZN, ‘WM n 2L"M.L/n pmzupkaip Exercise 1: Draw the small signal model for figure 1 using the variables gm and r0 for each transistor. [)0 not assume that these values are the same for each transistor. Because the sources of all of the MOS transistors are at small-signal ground, we do not have to compensate for any body effect. Small—signal analysis for operation in region HI: 0 : 033 d3 32 Figure 6 r03 1 [ng + ﬁjvgﬁ : O :3 vgs3 : 0 = vng ”0 = "gml(r01 H "02 )Vgsl = “ngOLI H ’22 )Vi (A, = «mm H r02); Also, we see that ...
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