EE 332 Lecture 4 - EE 332 DEVICES AND CIRCUITS II 30/08 BIPOLAR JUNCTION TRANSISTORS Microelectronic Circuit Design Jaeger/Blalock UW EE TC Chen

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8/28/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II 30/08 BIPOLAR JUNCTION TRANSISTORS ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock SIMPLIFIED MODEL FOR CIRCUIT ANALYSIS )] [exp( T BC R S V v I )] [exp( T BE S V v I ) exp( ) exp( ) 1 1 ( ) exp( ) exp( ) exp( ) 1 1 ( ) exp( T BC S T BE S E T BC R S T BE S B T BC R S T BE S C V v I V v I i V v I V v I i V v I V v I i Goal: to find V CE,sat Find V BC,sat and V BE,sat first ( - )/ F and ( + )/( R +1) V BE,sat and V BC, sat can be found, Saturation : Both EBJ and CBJ are forward bias. i C i B i E C (N) B(P) E (N) i R i F
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8/28/2010 2 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock SIMPLIFIED MODEL FOR CIRCUIT ANALYSIS )] [exp( T BC R S V v I )] [exp( T BE S V v I Saturation : Both EBJ and CBJ are forward bias. i C i B i E C (N) B(P) E (N) , , , , , 1 ln 11 [] 1 ln 1 1 1 [ (1 )] 1 1 1 ln[ ] 1 ( )(1 ) 1 : C B R BE sat T S FR C B F BC sat T S R F R CE sat BE sat BC sat C RB T C R R F B C Sat Forced B i i VV I i i I V V V i i V i i Defind i i      ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock SIMPLIFIED MODEL FOR CIRCUIT ANALYSIS )] [exp( T R S V v I )] [exp( T S V v I Saturation : Both EBJ and CBJ are forward bias. i C i B i E C (N) B(P) E (N) 1 ) exp( ) 1 ( 1 ) exp( ) 1 ( 1 1 ) exp( ) 1 ( 1 1 ) exp( ) 1 ( , , , , R F T sat CE R R T sat R R F R T sat R R F T sat R R Forced V V V V V V V V  F multiplied a value smaller than 1 F Forced i C,sat = Forced i B,sat
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This note was uploaded on 10/12/2010 for the course IT 23211 taught by Professor Tai during the Summer '10 term at Punjab Engineering College.

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EE 332 Lecture 4 - EE 332 DEVICES AND CIRCUITS II 30/08 BIPOLAR JUNCTION TRANSISTORS Microelectronic Circuit Design Jaeger/Blalock UW EE TC Chen

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