{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

EE 332 Lesson 0707 - BJT CIRCUIT ANALYSIS/LOAD LINE Use...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
7/7/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II WEEK 3 BIPOLAR JUNCTION TRANSISTORS ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock BJT CIRCUIT ANALYSIS/ LOAD LINE Input : V BE , I B KVL on input loop: V CC = V BE + I B R B (input load line) Output: V CE , I C KVL output loop: V CC = V CE + I C R C Use this simple BJT circuit as an example V CC R C R B I C I B V BE v CE 3 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock BJT CIRCUIT ANALYSIS/ LOAD LINE V CC = V BE + I B R B (input load line) V CC R C R B I C I B V BE V CE Input Characteristics: I B V BE ) 1 ( T BE V V F S B e I I V CC /R B V CC 4 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock BJT CIRCUIT ANALYSIS/ LOAD LINE Output Characteristics: V CC /R C V CC I C V CE Load line: V CC = V CE + I C R C I B from analysis of input side I B I C and V CE are the Q-point of the BJT V CC R C R B I C I B V BE V CE 5 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock BJT CIRCUIT ANALYSIS / 4-RESISTOR BIASING CIRCUIT Problem : Find operation point (I C , V CE ) Given :Q1={V BE,ON =0.7 V, V CE,sat =0.2 V F =100, R =0.5} R 1 =18k , R 2 =36k R C =10k , R E =10k
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}