{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

EE 332 Lesson 0709

# EE 332 Lesson 0709 - DESIGN FOR-INDEPENDENT BIASING...

This preview shows pages 1–2. Sign up to view the full content.

7/9/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II WEEK 3 BIPOLAR JUNCTION TRANSISTORS ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock DESIGN FOR -INDEPENDENT BIASING 4-RESISTOR SYSTEM V CC =9 V Q1 R 1 R 2 R C R E Assuming doing a 5% level design, in general, F is large, and if F =100 or more, then I B <1% of i C I B can be ignored since it generates 1% error with 5% level design. I C I B 3 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock DESIGN FOR -INDEPENDENT BIASING 4-RESISTOR SYSTEM V CC =9 V Q1 R 1 R 2 R C R E If I BB >>I B , then i B does not disturb the base voltage. RC RE CC CE ON BE CC E C RE E C RC C RC E RE C E ON BE CC ON BE B RE B CC B V V V V and V R R R V R R V R R V R V R V I I V R R R V V V V I R R R V V , ) ( ) 0 if (true , 2 1 1 , 2 1 1 , 2 1 1 I C I B I BB V B V BE,ON V RE Not a function of 4 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

### Page1 / 2

EE 332 Lesson 0709 - DESIGN FOR-INDEPENDENT BIASING...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online