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EE 332 Lesson 0728 - CS AMPLIFIER(INVERTING/SMALL SIGNAL...

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7/29/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II WEEK 6 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock CS AMPLIFIER (INVERTING) / SMALL SIGNAL MODEL Small signal model R I v S C1 R 2 R 1 R D R S M1 C2 V DD R L v o v o v s R G R I R D R L r r o g m v gs v gs R S 5 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock CS AMPLIFIER (INVERTING) / INPUT RESISTANCE 1 2 ( 1) / / / / x b E x CE i b v r r R i R R R r Recall input resistance of CE Common Source input resistance: The difference between small signal models of CE and CS is r  , ( 1) / / g S CS i G g G r r R R R r R   v o v s R G R I R D R L r o g m v gs v gs R S r g R i 6 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock CS AMPLIFIER (INVERTING) / OUTPUT RESISTANCE v o v s R G R I R D R L r o g m v gs v gs R S r d R o 0; ; (1 ) ( ) / / E c o E th c o th CE o c C R r r R r R r r R r R r R  if then if , then Recall output resistance of CE Common Source output resistance: The difference between small signal models of CE and CS is r  , then and then is large and 0; / / / / 0; / / CS S d o o d D o D CS S d o d D D R r r R r R r R R r R r R R ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock CS AMPLIFIER (INVERTING) / SMALL SIGNAL ANALYSIS DC analysis R I v S C1 R 2 R 1 R D R S M1 C2 V DD R L v o R I C1 R 2 R 1 R D R S M1 C2 V DD R L v o v S 8 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock CS AMPLIFIER (INVERTING) / SMALL SIGNAL ANALYSIS Theveninizing LHS loop: (2). RHS loop: Assuming saturation: 1 1 2 2 (1). (3). ( ) 2 (4). th DD DD DS D DS DS S n DS GS TN S DS S R V V R R V I R V I R K I V V V I R Substitute (4) into (3) 1. Solve for V S 2. Use (4) to solve for I DS 3. Use (2) to solve for V DS 4. Solve for V GS R 2 R 1 R D R S M1 V DD I DS V DS 9
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