EE 332 Lesson 0811 - 8/11/2010 FREQUENCY ANALYSIS IN THE...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
8/11/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II WEEK 8 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock FREQUENCY ANALYSIS IN THE DESIGN OF ANALOG CIRCUITS Intentional placed (external) capacitors Scrape frequency response Act as blocking capacitors Inherent (internal) capacitors Transistor Diode Stray capacitors Wires Printed circuit board paths ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock BJT AND ITS CAPACITIVE STRAY (INTERNAL) (1 ) s j D do j A C v W Recall diode capacitances: Depletion capacitance: Diffusion capacitance DT D m T T i Cg V  A: cross section area W: depletion width v D : Diode voltage j : build-in voltage ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock FREQUENCY RESPONSE OF CE SHORT- CIRCUIT / SMALL SIGNAL MODEL C BE = C = C je (depletion) + C b (diffusion under forward bias) C CB = C = C jc (depletion under reverse bias) Small signal equivalent for high frequencies If R 1 →0 V CC i o R 2 R 1 i i i i C r C r o i o ©UW EE TC Chen
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 10/12/2010 for the course IT 23211 taught by Professor Tai during the Summer '10 term at Punjab Engineering College.

Page1 / 3

EE 332 Lesson 0811 - 8/11/2010 FREQUENCY ANALYSIS IN THE...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online