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EE 332 week 7b - EE 332 DEVICES AND CIRCUITS II WEEK 7...

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8/4/2010 1 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock EE 332 DEVICES AND CIRCUITS II WEEK 7 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock OPERATIONAL AMPLIFIER DESIGN / STAGE THREE (OUTPUT STAGE) Output stage usually requires high input resistance, low output resistance and unit voltage gain Class A amplifier :
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8/4/2010 2 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock OPERATIONAL AMPLIFIER DESIGN / STAGE THREE (CLASS A AMPLIFIER) v i R L I SS v o V DD -V SS If R L = : D S G v DS v GS ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock OPERATIONAL AMPLIFIER DESIGN / STAGE THREE (CLASS A AMPLIFIER) v i R L I SS v o V DD -V SS If R L = : D S G v DS v GS What is the output range?
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8/4/2010 3 ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock OPERATIONAL AMPLIFIER DESIGN / STAGE THREE (CLASS A AMPLIFIER) v i R L I SS v o V DD -V SS If R L = : D S G v DS v GS ©UW EE TC Chen Microelectronic Circuit Design Jaeger/Blalock OPERATIONAL AMPLIFIER DESIGN / STAGE THREE (CLASS A AMPLIFIER) If R L  : v i R L I SS v o -V SS v DS v GS I DS
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  • Summer '10
  • tai
  • Electronic amplifier, RC circuit, High-pass filter, Low-pass filter, Microelectronic Circuit Design, EE TC Chen

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EE 332 week 7b - EE 332 DEVICES AND CIRCUITS II WEEK 7...

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