This preview shows pages 1–3. Sign up to view the full content.
This preview has intentionally blurred sections. Sign up to view the full version.View Full Document
Unformatted text preview: Charge Pumps: An Overview Louie Pylarinos Edward S. Rogers Sr. Department of Electrical and Computer Engineering University of Toronto Abstract- In this paper we review the genesis of charge pump circuits, their evolution and improvement in design and their importance in nonvolatile memory circuits, low-voltage analog building blocks and other applications. I. INTRODUCTION Charge pumps are circuits that generate a voltage larger than the supply voltage from which they operate. To see how this is possible, consider the simple circuit consisting of a single capacitor and three switches shown in Fig. 1. Fig. 1 . Simple voltage doubler During clock phase , switches S 1 and S 3 are closed and the capacitor is charged to the supply voltage, V DD . Next switch S 2 is closed and the bottom plate of the capacitor assumes a potential V DD , while the capacitor maintains its charge of V DD C from the previous phase. This means that during (1) or (2) Thus, in the absence of a d.c. load, an output voltage has been generated that is twice the supply voltage. In order to accommodate a load at the output, the circuit would be modified by adding an output capacitance as shown in Fig. 2. Fig. 2. Practical voltage doubler In this case, the ideal output voltage is given by (3) If a load R L is present, then a ripple voltage, V R , is gener- ated at the output. The ripple voltage can be reduced by making C out sufficiently large so that V R is negligible compared to V out . Voltage multiplication greater than twice the supply voltage can be achieved by cascading more than one capacitor in series. This voltage multiplier technique seems to have first been proposed by Cockcroft and Wal- ton  and was used to generate steady potentials near 800,000 volts in connection with studying the atomic structure of matter. The Cockcroft-Walton multiplying circuit is shown in Fig. 3. Three capacitors, C A , C B and C C , each of capacity C, are connected in series and capac- itor C A is connected to the supply voltage V DD . During phase capacitor C 1 is connected to C A and charged to voltage V DD . When the switches change position during φ φ φ C S 1 S 2 S 3 V out V DD φ φ V out V DD 29 – ( C ⋅ V DD C ⋅ = V out 2 V DD ⋅ = φ φ φ C S 1 S 2 S 3 V out V DD φ S4 C out R L V out C C C out +-------------------- 2 V DD ⋅ ⋅ = φ Fig. 3 . Cockcroft-Walton voltage multiplier the next cycle, , capacitor C 1 will share its charge with capacitor C B and both will be charged to V DD /2 if they have equal capacity. In the next cycle, C 2 and C B will be connected and share a potential of V DD /4 while C 1 is once again charged to V DD . It is thus obvious that if this pro- cess continues for a few cycles, charge will be transferred to all the capacitors until a potential of 3V DD is developed across the output V out ....
View Full Document
This note was uploaded on 10/16/2010 for the course GRADUATE I Power IC taught by Professor Chern-linchen during the Fall '09 term at National Taiwan University.
- Fall '09