G-Etching - National Chiao-Tung University Department of...

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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 1 Etching History 1959 Robert Noyce at Fairchild Semiconductor invented first planar silicon IC. Mid-1970 employed photo lithography Novolak-based resist to pattern device with critical linewidth < 3 μ m. Wet etching used for manufacturing device with critical linewidth > 3 μ m. 1960 pioneering work on gaseous free radical etching by J. Ligenza at Bell Lab. 1980 progressing to 1 μ m design rule, plasma etching became dominant process.
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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 2 Etching Profile Substrate PR PR Substrate PR PR Substrate PR PR Substrate PR PR Substrate PR PR Substrate PR PR Anisotropic Isotropic Tapered Undercut Notch Trench
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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 3 Wet Processing Equipments conventional wet bench, batch type vapor etcher, batch type spin etcher, single wafer spin etcher spin dryer, IPA dryer, Maragoni dryer, etc. Chemistries oxide etch - BOE, DHF, etc. nitride etch - hot HF, hot H 3 PO 4 Si etch - HF+HNO 3 , KOH, etc Si polishing - HF+HNO 3 +H 2 SO 4 or H 3 PO 4 Al etch - HF+HNO 3 +CH 3 COOH+H 3 PO 4 Ti/TiN etch - NH 4 OH+H 2 O 2 general metal etch - HNO 3 , etc polymer - IPA, organic solvent
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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 4 Application of Wet Etching Film stripping Pre metal, Poly-Si, Diffusion, Oxidation Clean Damage Removal after Dry Etching Polymer Removal Selective Metal Etching from Silicide
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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 5 SiO 2 Wet Etching Diluted HF HF:H 2 O=1:10 – 1:1000 The overall reaction is SiO 2 +6HF->H 2 SiF 6 +2H 2 O The detailed reaction is very complex. Buffered HF or Buffered Oxide Etchant (BOE) NH 4 F+HF+H 2 O The addition of NH 4 F form buffered solution. NH 4 F controls PH value and provides sufficient F to maintain constant etching rate.
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Etching - 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 崔 National Chiao-Tung University Department of Electronics Engineering & Institute of electronics 6 Si 3 N 4 Wet Etching Hot H 3 PO 4 91.5% H 3 PO 4 boiling at 130-180 ° C LPCVD Si 3 N 4 ~ 10 nm/min CVD SiO 2 ~ 0.1-1 nm/min Si ~ slightly faster than SiO 2 H 2 O depletion will degrade etch rate selectivity Hot HF or DHF
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